Targets should model flags explicitly

[lattner]

Bugzilla Link	1401
Resolution	FIXED
Resolved on	Aug 29, 2010 02:08
Version	trunk
OS	All
Depends On	llvm/llvm-bugzilla-archive#3203
Blocks	#1760
CC	@asl,@lattner,@sunfishcode

Extended Description

The various targets (x86, arm, ppc, etc) should model their effect on their flags register (EFLAGS, CR0,
etc). This will let us optimize these away, and is a dependency for various code motion optimizations at
the machine instr level (scheduling, licm, etc).

-Chris

[lattner]

Evan, is this done? Target-independent support is in, right?

[llvmbot]

Not done. Three issues: 1. Only x86 has made the isel changes and implemented the necessary target hooks. 2. Only the BURR scheduler has been taught about condition code registers. 3. Once 1+2 are done. We need to change target independent definition of adde, addc, subc, and sube to not to use flags.

[lattner]

Is this done yet? X86 models these pretty well these days.

[llvmbot]

But only x86. No other targets models flags. Also only burr scheduler is able to handle flag dependencies.

[lattner]

I don't see a point of keeping this bug around anymore.

[sunfishcode]

MVT::Flag is over-conservative. It's still desirable to replace it with more precise physreg modeling.

[lattner]

Is this PR going to help with that?

[asl]

MVT::Flag is over-conservative. It's still desirable to replace it with more
precise physreg modeling.
as soon as all schedulers will support psysreg deps

[lattner]

We have the ability to do this, X86 does it at least partially. There is no reason to keep this open.

[efriedma-quic]

mentioned in issue llvm/llvm-bugzilla-archive#3203