missing CPUID entry for Core2 Quad

[edwintorok]

Bugzilla Link	3210
Resolution	FIXED
Resolved on	Jan 05, 2009 02:45
Version	unspecified
OS	Linux
CC	@asl

Extended Description

In X86Subtarget.cpp:

case 6:
switch (Model) {
case 1: return "pentiumpro";
case 3:
case 5:
case 6: return "pentium2";
case 7:
case 8:
case 10:
case 11: return "pentium3";
case 9:
case 13: return "pentium-m";
case 14: return "yonah";
case 15: return "core2";
default: return "i686";
}

My CPU is:
processor : 3
vendor_id : GenuineIntel
cpu family : 6
model : 23
model name : Intel(R) Core(TM)2 Quad CPU Q9550 @ 2.83GHz
stepping : 7

So it will go to i686 instead of core2.

I think more models should be added there.

[llvmbot]

I agree. Can you propose a patch? Thanks.

[edwintorok]

patch to add more CPUIDs
This add Family 6 Model 22 (Celeron 540), 23 (Penryn, Wolfdale, Yorkfield);
also Family 15 Model 6, and 28 (atom, i7).

Note that before this patch Model 23 was detected as Model 7, because the ExtendedModel bits weren't taken into consideration.

This only affected llc -mattr=+something, or llc -mattr=-something; since without mattr it detected the SSE level using the feature bits, and not by using the model.

[edwintorok]

add -debug-only subtarget
$ Debug/bin/llc -debug-only subtarget x.bc -march=x86 -f
Subtarget features: SSELevel 6, 3DNowLevel 0, 64bit 1

[edwintorok]

Created an attachment (id=2324) [details]
patch to add more CPUIDs

This add Family 6 Model 22 (Celeron 540), 23 (Penryn, Wolfdale, Yorkfield);
also Family 15 Model 6, and 28 (atom, i7).

Note that before this patch Model 23 was detected as Model 7, because the
ExtendedModel bits weren't taken into consideration.

This only affected llc -mattr=+something, or llc -mattr=-something; since
without mattr it detected the SSE level using the feature bits, and not by
using the model.

I tested this on a Intel(R) Core(TM)2 Quad CPU Q9550 @ 2.83GHz, which is Family 6, Model 23. It correctly detects sse41 support even with -mattr now.

The problem is that some tests [*] that do -mattr=+sse2 fail now, because it now also has sse41 enabled. Should -mattr=-sse3 be added to them (which would disable sse4.1 too)?

FAIL: /home/edwin/llvm-svn/llvm/test/CodeGen/X86/vec_extract.ll
FAIL: /home/edwin/llvm-svn/llvm/test/CodeGen/X86/vec_insert-2.ll
FAIL: /home/edwin/llvm-svn/llvm/test/CodeGen/X86/vec_insert-3.ll
FAIL: /home/edwin/llvm-svn/llvm/test/CodeGen/X86/vec_insert.ll
FAIL: /home/edwin/llvm-svn/llvm/test/CodeGen/X86/vec_shuffle-12.ll

[llvmbot]

Ah, I didn't see your proposed patch until now. Anyway, it's fixed with 61555, 61556, and 61602. I wonder if we should add a new processor names for Atom and Corei7.

[llvmbot]

I've added corei7 and atom. See r61603.

[lattner]

adding one for atom and corei7 would be nice.

[edwintorok]

adding one for atom and corei7 would be nice.

I think there is an error in Intel's CPUID tables (that I based my patch on), it can't be that both i7 and Atom share same model no.

According to the individual CPU's datasheets, i7 has model 00011010 (26), and
atom has 00011100 (28). However I have neither of these CPUs, so I can't test that :(

Also have a look here:
http://setiathome.berkeley.edu/top_hosts.php?sort_by=total_credit
http://setiathome.berkeley.edu/top_hosts.php?sort_by=total_credit
http://einstein.phys.uwm.edu/hosts_user.php?userid=47806

It says:
GenuineIntel
Intel(R) Core(TM) i7 CPU 920 @ 2.67GHz [Intel64 Family 6 Model 26 Stepping 4]
GenuineIntel
Intel(R) Atom(TM) CPU N270 @ 1.60GHz [x86 Family 6 Model 28 Stepping 2]

Look at 320047.pdf (Intel® Atom™ Processor N270 Series Specification Update September 2008 Revision 003) and 320836.pdf (Intel® Core™ i7 Processor
Extreme Edition Series and Intel® Core™ i7 Processor Specification Update November 2008):

The Intel® Core™ i7 Processor stepping can be identified by the following register
contents:
Extended Extended Processor Family Model Stepping
Reserved Reserved
Family1 Model2 Type3 Code4 Number5 ID6
31:28 27:20 19:16 15:14 13:12 11:8 7:4 3:0
00000000b 0001b 00b 0110 1010b 0011b

        Mobile Intel® Atom™ processor N270 series (code named Diamondville Processor-SC) on 45-nm process stepping can be identified by the following register contents:

Table 1. Component Identification via Programming Interface
Reserved Extended Extended Reserved Processor Family Model Stepping
Family1 Model2 Type3 Code4 Number5 ID6
31:28 27:20 19:16 15:13 12 11:8 7:4 3:0
0000000b 0001b 0b 0110b 1100b XXXXb

[llvmbot]

Updated.