Code generator does not support select conditions with vector type #3756
Description
| Bugzilla Link | 3384 |
| Resolution | DUPLICATE |
| Resolved on | May 11, 2011 17:24 |
| Version | unspecified |
| OS | All |
| Reporter | LLVM Bugzilla Contributor |
| CC | @thielema |
Extended Description
With LLVM 2.4, generating code (x86) for the following generates a failed assertion:
define <4 x float> @fun(<4 x float>) {
_L1:
%1 = extractelement <4 x float> %0, i32 0
%2 = fcmp olt float %1, 0.000000e+00
%3 = insertelement <4 x i1> undef, i1 %2, i32 0
%4 = extractelement <4 x float> %0, i32 1
%5 = fcmp olt float %4, 0.000000e+00
%6 = insertelement <4 x i1> %3, i1 %5, i32 1
%7 = extractelement <4 x float> %0, i32 2
%8 = fcmp olt float %7, 0.000000e+00
%9 = insertelement <4 x i1> %6, i1 %8, i32 2
%10 = extractelement <4 x float> %0, i32 3
%11 = fcmp olt float %10, 0.000000e+00
%12 = insertelement <4 x i1> %9, i1 %11, i32 3
%13 = sub <4 x float> < float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00 >, %0
%14 = select <4 x i1> %12, <4 x float> %13, <4 x float> %0
ret <4 x float> %14
}