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llvm:instcombineCovers the InstCombine, InstSimplify and AggressiveInstCombine passesCovers the InstCombine, InstSimplify and AggressiveInstCombine passesmiscompilation
Description
The following test case is miscompiled by InstCombine:
define <2 x i32> @src(<2 x i1> %x, <2 x i32> %y) {
%0:
%sext.i1 = sext <2 x i1> %x to <2 x i32>
%r = urem <2 x i32> %y, %sext.i1
ret <2 x i32> %r
}
=>
define <2 x i32> @tgt(<2 x i1> %x, <2 x i32> %y) {
%0:
%1 = icmp eq <2 x i32> %y, { 4294967295, 4294967295 }
%r = select <2 x i1> %1, <2 x i32> { 0, 0 }, <2 x i32> %y
ret <2 x i32> %r
}
Transformation doesn't verify!
ERROR: Value mismatch
Here is the alive2 output that produces an example input that causes a value mismatch: https://alive2.llvm.org/ce/z/JX-TLu
And here is the original IR file that produced the miscompilation:
define <2 x i32> @zext_bool_urem_divisor_vec(<2 x i1> %x, <2 x i32> %y) {
%ext = zext <2 x i1> %x to <2 x i32>
%sext.i = sext <2 x i1> %x to <2 x i32>
%sext.i1 = sext <2 x i1> %x to <2 x i32>
%r.i2 = xor <2 x i32> <i32 42, i32 -7>, %sext.i1
%r.i = xor <2 x i32> <i32 42, i32 -7>, %r.i2
%r = urem <2 x i32> %y, %r.i
ret <2 x i32> %r
}
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llvm:instcombineCovers the InstCombine, InstSimplify and AggressiveInstCombine passesCovers the InstCombine, InstSimplify and AggressiveInstCombine passesmiscompilation