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[llvm] Add NCD search on Array of basic blocks (NFC) #119355
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[llvm] Add NCD search on Array of basic blocks (NFC) #119355
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@llvm/pr-subscribers-llvm-support @llvm/pr-subscribers-backend-risc-v Author: Elizaveta Noskova (enoskova-sc) ChangesShrink-Wrap points split Part 2. Part 1: #117862 (comment) Full diff: https://github.com/llvm/llvm-project/pull/119355.diff 3 Files Affected:
diff --git a/llvm/include/llvm/CodeGen/MachineDominators.h b/llvm/include/llvm/CodeGen/MachineDominators.h
index 74cf94398736dd..88800d91ef51a9 100644
--- a/llvm/include/llvm/CodeGen/MachineDominators.h
+++ b/llvm/include/llvm/CodeGen/MachineDominators.h
@@ -185,6 +185,11 @@ class MachineDominatorTree : public DomTreeBase<MachineBasicBlock> {
return Base::findNearestCommonDominator(A, B);
}
+ /// Returns the nearest common dominator of the given blocks.
+ /// If that tree node is a virtual root, a nullptr will be returned.
+ MachineBasicBlock *
+ findNearestCommonDominator(ArrayRef<MachineBasicBlock *> Blocks) const;
+
MachineDomTreeNode *operator[](MachineBasicBlock *BB) const {
applySplitCriticalEdges();
return Base::getNode(BB);
diff --git a/llvm/lib/CodeGen/MachineDominators.cpp b/llvm/lib/CodeGen/MachineDominators.cpp
index a2cc8fdfa7c9f9..384f90c6da66c0 100644
--- a/llvm/lib/CodeGen/MachineDominators.cpp
+++ b/llvm/lib/CodeGen/MachineDominators.cpp
@@ -189,3 +189,19 @@ void MachineDominatorTree::applySplitCriticalEdges() const {
NewBBs.clear();
CriticalEdgesToSplit.clear();
}
+
+MachineBasicBlock *MachineDominatorTree::findNearestCommonDominator(
+ ArrayRef<MachineBasicBlock *> Blocks) const {
+ assert(!Blocks.empty());
+
+ MachineBasicBlock *NCD = Blocks.front();
+ for (MachineBasicBlock *BB : Blocks.drop_front()) {
+ NCD = Base::findNearestCommonDominator(NCD, BB);
+
+ // Stop when the root is reached.
+ if (Base::isVirtualRoot(Base::getNode(NCD)))
+ return nullptr;
+ }
+
+ return NCD;
+}
diff --git a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
index deb0b627225c64..0de1f1d821a6e2 100644
--- a/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
+++ b/llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
@@ -1607,6 +1607,8 @@ bool RISCVFrameLowering::assignCalleeSavedSpillSlots(
int FrameIdx = MFI.CreateFixedSpillStackObject(Size, Offset);
assert(FrameIdx < 0);
CS.setFrameIdx(FrameIdx);
+ if (RISCVRegisterInfo::isRVVRegClass(RC))
+ MFI.setStackID(FrameIdx, TargetStackID::ScalableVector);
continue;
}
}
@@ -1623,6 +1625,8 @@ bool RISCVFrameLowering::assignCalleeSavedSpillSlots(
if ((unsigned)FrameIdx > MaxCSFrameIndex)
MaxCSFrameIndex = FrameIdx;
CS.setFrameIdx(FrameIdx);
+ if (RISCVRegisterInfo::isRVVRegClass(RC))
+ MFI.setStackID(FrameIdx, TargetStackID::ScalableVector);
}
// Allocate a fixed object that covers the full push or libcall size.
|
@paperchalice, could you, please, review. |
|
||
MachineBasicBlock *MachineDominatorTree::findNearestCommonDominator( | ||
ArrayRef<MachineBasicBlock *> Blocks) const { | ||
assert(!Blocks.empty()); |
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assert
with error message if possible: https://llvm.org/docs/CodingStandards.html#id45
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addressed
// Stop when the root is reached. | ||
if (Base::isVirtualRoot(Base::getNode(NCD))) | ||
return nullptr; | ||
} |
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Base::getNode
here is unfortunate, use wrapped version here to get the latest dominator tree.
Addressed by #115111.
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addressed
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Can you find a spot in existing code to use this factored out routine? A few ideas:
FindIDom in ShrinkWrap
DeleteUnreachable in GenericDomConstruction.
SILowerI1Copies.cpp
HexagonFrameLowering.cpp
Basically, there's a whole bunch of these. Please common a few so that we're not adding untested code.
This appears to be identical code to findNearestCommonDominator. Can we sink this into the GenericIDom layer instead?
Reverse ping. Also, I think this could be rebased now that the base patch has landed. |
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@preames, @michaelmaitland, I have addressed your comments. |
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LGTM
I think you can mark the title as NFC?
@preames, @paperchalice, any other comments? |
You've got an LGTM and we're a one approval culture. My prior comments about reuse still stands, but that can easily be extended in a follow up commit. |
Currently mir supports only one save and one restore point specification: ``` savePoint: '%bb.1' restorePoint: '%bb.2' ``` This patch provide possibility to have multiple save and multiple restore points in mir: ``` savePoints: - point: '%bb.1' restorePoints: - point: '%bb.2' ``` Shrink-Wrap points split Part 3. RFC: https://discourse.llvm.org/t/shrink-wrap-save-restore-points-splitting/83581 Part 1: #117862 Part 2: #119355 Part 4: #119358 Part 5: #119359
Currently mir supports only one save and one restore point specification: ``` savePoint: '%bb.1' restorePoint: '%bb.2' ``` This patch provide possibility to have multiple save and multiple restore points in mir: ``` savePoints: - point: '%bb.1' restorePoints: - point: '%bb.2' ``` Shrink-Wrap points split Part 3. RFC: https://discourse.llvm.org/t/shrink-wrap-save-restore-points-splitting/83581 Part 1: llvm/llvm-project#117862 Part 2: llvm/llvm-project#119355 Part 4: llvm/llvm-project#119358 Part 5: llvm/llvm-project#119359
…119358) This patch adds the MIR parsing and serialization support for save and restore points with subsets of callee saved registers. That is, it syntactically allows a function to contain two or more distinct sub-regions in which distinct subsets of registers are spilled/filled as callee save. This is useful if e.g. one of the CSRs isn't modified in one of the sub-regions, but is in the other(s). Support for actually using this capability in code generation is still forthcoming. This patch is the next logical step for multiple save/restore points support. All points are now stored in DenseMap from MBB to vector of CalleeSavedInfo. Shrink-Wrap points split Part 4. RFC: https://discourse.llvm.org/t/shrink-wrap-save-restore-points-splitting/83581 Part 1: #117862 (landed) Part 2: #119355 (landed) Part 3: #119357 (landed) Part 5: #119359 (likely to be further split)
… registers (#119358) This patch adds the MIR parsing and serialization support for save and restore points with subsets of callee saved registers. That is, it syntactically allows a function to contain two or more distinct sub-regions in which distinct subsets of registers are spilled/filled as callee save. This is useful if e.g. one of the CSRs isn't modified in one of the sub-regions, but is in the other(s). Support for actually using this capability in code generation is still forthcoming. This patch is the next logical step for multiple save/restore points support. All points are now stored in DenseMap from MBB to vector of CalleeSavedInfo. Shrink-Wrap points split Part 4. RFC: https://discourse.llvm.org/t/shrink-wrap-save-restore-points-splitting/83581 Part 1: llvm/llvm-project#117862 (landed) Part 2: llvm/llvm-project#119355 (landed) Part 3: llvm/llvm-project#119357 (landed) Part 5: llvm/llvm-project#119359 (likely to be further split)
…lvm#119358) This patch adds the MIR parsing and serialization support for save and restore points with subsets of callee saved registers. That is, it syntactically allows a function to contain two or more distinct sub-regions in which distinct subsets of registers are spilled/filled as callee save. This is useful if e.g. one of the CSRs isn't modified in one of the sub-regions, but is in the other(s). Support for actually using this capability in code generation is still forthcoming. This patch is the next logical step for multiple save/restore points support. All points are now stored in DenseMap from MBB to vector of CalleeSavedInfo. Shrink-Wrap points split Part 4. RFC: https://discourse.llvm.org/t/shrink-wrap-save-restore-points-splitting/83581 Part 1: llvm#117862 (landed) Part 2: llvm#119355 (landed) Part 3: llvm#119357 (landed) Part 5: llvm#119359 (likely to be further split)
Shrink-Wrap points split Part 2.
RFC: https://discourse.llvm.org/t/shrink-wrap-save-restore-points-splitting/83581
Part 1: #117862
Part 3: #119357
Part 4: #119358
Part 5: #119359