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[HLSL] Fix resource wrapper declaration #129100
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1e794cd
[HLSL] Fix resrouce wrapper declaration
s-perron ff84239
Fix format, and update ast tests.
s-perron 8848330
Rewrite `isHLSLResrouceWrapper` as suggested
s-perron 554a940
Remove redudent isResourceRecordType and update test.
s-perron 70912b1
Update clang/lib/Sema/SemaHLSL.cpp
s-perron 2240a33
Rename and merge functions.
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16 changes: 5 additions & 11 deletions
16
clang/test/CodeGenHLSL/builtins/RWBuffer-constructor-opt.hlsl
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -1,21 +1,15 @@ | ||
| // RUN: %clang_cc1 -triple dxil-pc-shadermodel6.3-library -x hlsl -emit-llvm -O3 -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-DXIL | ||
| // RUN: %clang_cc1 -triple spirv-vulkan-compute -x hlsl -emit-llvm -O3 -o - %s | FileCheck %s --check-prefixes=CHECK,CHECK-SPIRV | ||
| // RUN: %clang_cc1 -triple dxil-pc-shadermodel6.3-library -x hlsl -emit-llvm -O3 -o - %s | FileCheck %s | ||
| // RUN: %clang_cc1 -triple spirv-vulkan-compute -x hlsl -emit-llvm -O3 -o - %s | FileCheck %s | ||
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| // CHECK-SPIRV: %"class.hlsl::RWBuffer" = type { target("spirv.Image", float, 5, 2, 0, 0, 2, 0) } | ||
| // CHECK-DXIL: %"class.hlsl::RWBuffer" = type { target("dx.TypedBuffer", float, 1, 0, 0) } | ||
| // All referenced to an unused resource should be removed by optimizations. | ||
| RWBuffer<float> Buf : register(u5, space3); | ||
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| [shader("compute")] | ||
| [numthreads(1, 1, 1)] | ||
| void main() { | ||
| // CHECK-NOT: resource.handlefrombinding | ||
| // CHECK: define void @main() | ||
| // CHECK-NEXT: entry: | ||
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| // CHECK-SPIRV-NEXT: %[[HANDLE:.*]] = tail call target("spirv.Image", float, 5, 2, 0, 0, 2, 0) @llvm.spv.resource.handlefrombinding.tspirv.Image_f32_5_2_0_0_2_0t(i32 3, i32 5, i32 1, i32 0, i1 false) | ||
| // CHECK-SPIRV-NEXT: store target("spirv.Image", float, 5, 2, 0, 0, 2, 0) %[[HANDLE:.*]], ptr @Buf, align 8 | ||
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| // CHECK-DXIL-NEXT: %[[HANDLE:.*]] = tail call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 3, i32 5, i32 1, i32 0, i1 false) | ||
| // CHECK-DXIL-NEXT: store target("dx.TypedBuffer", float, 1, 0, 0) %[[HANDLE]], ptr @Buf, align 4 | ||
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| // CHECK-NEXT: ret void | ||
| // CHECK-NOT: resource.handlefrombinding | ||
| } | ||
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -1,34 +1,34 @@ | ||
| // RUN: %clang_cc1 -triple dxil--shadermodel6.6-compute -x hlsl -finclude-default-header -emit-llvm -disable-llvm-passes -o - %s | FileCheck %s | ||
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| // CHECK: define internal void @_init_resource_U0S0() | ||
| // CHECK: %U0S0_h = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false) | ||
| // CHECK: store target("dx.TypedBuffer", <4 x float>, 1, 0, 0) %U0S0_h, ptr @U0S0, align 4 | ||
| // CHECK: define internal void @_init_resource__ZL4U0S0() | ||
| // CHECK: [[H:%.*]] = call target("dx.TypedBuffer", <4 x float>, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_v4f32_1_0_0t(i32 0, i32 0, i32 1, i32 0, i1 false) | ||
| // CHECK: store target("dx.TypedBuffer", <4 x float>, 1, 0, 0) [[H]], ptr @_ZL4U0S0, align 4 | ||
| RWBuffer<float4> U0S0 : register(u0); | ||
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| // CHECK: define internal void @_init_resource_U5S3() | ||
| // CHECK: %U5S3_h = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 3, i32 5, i32 1, i32 0, i1 false) | ||
| // CHECK: store target("dx.TypedBuffer", float, 1, 0, 0) %U5S3_h, ptr @U5S3, align 4 | ||
| // CHECK: define internal void @_init_resource__ZL4U5S3() | ||
| // CHECK: [[H:%.*]] = call target("dx.TypedBuffer", float, 1, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.TypedBuffer_f32_1_0_0t(i32 3, i32 5, i32 1, i32 0, i1 false) | ||
| // CHECK: store target("dx.TypedBuffer", float, 1, 0, 0) [[H]], ptr @_ZL4U5S3, align 4 | ||
| RWBuffer<float> U5S3 : register(u5, space3); | ||
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| // CHECK: define internal void @_init_resource_T2S2() | ||
| // CHECK: %T2S2_h = call target("dx.RawBuffer", i32, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i32_0_0t(i32 2, i32 2, i32 1, i32 0, i1 false) | ||
| // CHECK: store target("dx.RawBuffer", i32, 0, 0) %T2S2_h, ptr @T2S2, align 4 | ||
| // CHECK: define internal void @_init_resource__ZL4T2S2() | ||
| // CHECK: [[H:%.*]] = call target("dx.RawBuffer", i32, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_i32_0_0t(i32 2, i32 2, i32 1, i32 0, i1 false) | ||
| // CHECK: store target("dx.RawBuffer", i32, 0, 0) [[H]], ptr @_ZL4T2S2, align 4 | ||
| StructuredBuffer<int> T2S2 : register(t2, space2); | ||
| struct S { | ||
| float4 f; | ||
| int i; | ||
| }; | ||
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| // CHECK: define internal void @_init_resource_T3S0() | ||
| // CHECK: %T3S0_h = call target("dx.RawBuffer", %struct.S, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_s_struct.Ss_0_0t(i32 0, i32 3, i32 1, i32 0, i1 false) | ||
| // CHECK: store target("dx.RawBuffer", %struct.S, 0, 0) %T3S0_h, ptr @T3S0, align 4 | ||
| // CHECK: define internal void @_init_resource__ZL4T3S0() | ||
| // CHECK: [[H:%.*]] = call target("dx.RawBuffer", %struct.S, 0, 0) @llvm.dx.resource.handlefrombinding.tdx.RawBuffer_s_struct.Ss_0_0t(i32 0, i32 3, i32 1, i32 0, i1 false) | ||
| // CHECK: store target("dx.RawBuffer", %struct.S, 0, 0) [[H]], ptr @_ZL4T3S0, align 4 | ||
| StructuredBuffer<S> T3S0 : register(t3); | ||
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| // CHECK: define void @main() | ||
| // CHECK: call void @_init_resource_U0S0() | ||
| // CHECK: call void @_init_resource_U5S3() | ||
| // CHECK: call void @_init_resource_T2S2() | ||
| // CHECK: call void @_init_resource_T3S0() | ||
| // CHECK: call void @_init_resource__ZL4U0S0() | ||
| // CHECK: call void @_init_resource__ZL4U5S3() | ||
| // CHECK: call void @_init_resource__ZL4T2S2() | ||
| // CHECK: call void @_init_resource__ZL4T3S0() | ||
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| [numthreads(4,1,1)] | ||
| void main() {} |
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