[RISCV] Correct the register class in the C_SWSP and C_SDSP InstAliases.

[topperc]

These instructions use GPR not GPRNoX0. Only the load forms prohibit X0.

[llvmbot]

@llvm/pr-subscribers-mc

@llvm/pr-subscribers-backend-risc-v

Author: Craig Topper (topperc)

Changes

These instructions use GPR not GPRNoX0. Only the load forms prohibit X0.

---

Full diff: https://github.com/llvm/llvm-project/pull/132086.diff

3 Files Affected:

• (modified) llvm/lib/Target/RISCV/RISCVInstrInfoC.td (+2-2)
• (modified) llvm/test/MC/RISCV/rv64c-aliases-valid.s (+2)
• (modified) llvm/test/MC/RISCV/rvc-aliases-valid.s (+2)

diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoC.td b/llvm/lib/Target/RISCV/RISCVInstrInfoC.td
index b3eca8ff89904..375fe640c6c3d 100644
--- a/llvm/lib/Target/RISCV/RISCVInstrInfoC.td
+++ b/llvm/lib/Target/RISCV/RISCVInstrInfoC.td
@@ -715,14 +715,14 @@ let Predicates = [HasStdExtCOrZca] in {
 def : InstAlias<"c.lw $rd, (${rs1})", (C_LW GPRC:$rd, GPRCMem:$rs1, 0)>;
 def : InstAlias<"c.sw $rs2, (${rs1})", (C_SW GPRC:$rs2, GPRCMem:$rs1, 0)>;
 def : InstAlias<"c.lwsp $rd, (${rs1})", (C_LWSP GPRNoX0:$rd, SPMem:$rs1, 0)>;
-def : InstAlias<"c.swsp $rs2, (${rs1})", (C_SWSP GPRNoX0:$rs2, SPMem:$rs1, 0)>;
+def : InstAlias<"c.swsp $rs2, (${rs1})", (C_SWSP GPR:$rs2, SPMem:$rs1, 0)>;
 }
 
 let Predicates = [HasStdExtCOrZca, IsRV64] in {
 def : InstAlias<"c.ld $rd, (${rs1})", (C_LD GPRC:$rd, GPRCMem:$rs1, 0)>;
 def : InstAlias<"c.sd $rs2, (${rs1})", (C_SD GPRC:$rs2, GPRCMem:$rs1, 0)>;
 def : InstAlias<"c.ldsp $rd, (${rs1})", (C_LDSP GPRNoX0:$rd, SPMem:$rs1, 0)>;
-def : InstAlias<"c.sdsp $rs2, (${rs1})", (C_SDSP GPRNoX0:$rs2, SPMem:$rs1, 0)>;
+def : InstAlias<"c.sdsp $rs2, (${rs1})", (C_SDSP GPR:$rs2, SPMem:$rs1, 0)>;
 }
 
 let Predicates = [HasStdExtCOrZcfOrZce, HasStdExtF, IsRV32] in {
diff --git a/llvm/test/MC/RISCV/rv64c-aliases-valid.s b/llvm/test/MC/RISCV/rv64c-aliases-valid.s
index 685669737d9bb..a464c24609fba 100644
--- a/llvm/test/MC/RISCV/rv64c-aliases-valid.s
+++ b/llvm/test/MC/RISCV/rv64c-aliases-valid.s
@@ -112,3 +112,5 @@ c.sdsp x8, (x2)
 c.ldsp x18, (x2)
 # CHECK-EXPAND: c.sdsp s2, 0(sp)
 c.sdsp x18, (x2)
+# CHECK-EXPAND: c.sdsp zero, 0(sp)
+c.sdsp x0, (x2)
diff --git a/llvm/test/MC/RISCV/rvc-aliases-valid.s b/llvm/test/MC/RISCV/rvc-aliases-valid.s
index 23398f9721446..c18e06fdc1bee 100644
--- a/llvm/test/MC/RISCV/rvc-aliases-valid.s
+++ b/llvm/test/MC/RISCV/rvc-aliases-valid.s
@@ -21,3 +21,5 @@ c.swsp x8, (x2)
 c.lwsp x18, (x2)
 # CHECK-EXPAND: c.swsp s2, 0(sp)
 c.swsp x18, (x2)
+# CHECK-EXPAND: c.swsp zero, 0(sp)
+c.swsp x0, (x2)