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[LV] Create in-loop sub reductions #147026
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Original file line number | Diff line number | Diff line change |
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@@ -5151,6 +5151,8 @@ bool AArch64TTIImpl::isLegalToVectorizeReduction( | |
return false; | ||
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switch (RdxDesc.getRecurrenceKind()) { | ||
case RecurKind::Sub: | ||
case RecurKind::AddChainWithSubs: | ||
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There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Just a heads up, this caused some regressions on RISC-V because sub reductions are now a different type. We have a fix up to update the TTI hook here #154753 but it might be worth looking at the other targets/X86 to see if they also need to have their There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. From what I can see only AArch64 and RISC-V targets have this target hook implemented. There was a problem hiding this comment. Choose a reason for hiding this commentThe reason will be displayed to describe this comment to others. Learn more. Thanks for fixing that. Sander is right about it only being implemented for AArch64 and RISC-V. It just returns a blanket true by default. |
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case RecurKind::Add: | ||
case RecurKind::FAdd: | ||
case RecurKind::And: | ||
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You will need to update a number of places with switches over recurrence kind, in SLPVectorizer and possibly others
Probably also should have a SLP test to make sure its handled correctly.
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Thanks, I've added
RecurKind::Sub
cases to the SLP vectorizer and added a test. I don't think adding proper sub reduction support to SLP is in scope of this PR so haven't added full support.