Skip to content

[AMDGPU] Determine MCFixupKind in a more general way. NFCI. #155864

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Merged
merged 2 commits into from
Aug 28, 2025
+3 −9
Merged

[AMDGPU] Determine MCFixupKind in a more general way. NFCI. #155864

Changes from all commits
Commits
Show all changes
2 commits
Select commit Hold shift + click to select a range
38779aa
[AMDGPU] Determine MCFixupKind in a more general way. NFCI.
jayfoad Aug 28, 2025
0ac94da
One more place
jayfoad Aug 28, 2025
File filter

Filter by extension

Filter by extension
Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
12 changes: 3 additions & 9 deletions llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUMCCodeEmitter.cpp
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -272,10 +272,7 @@ std::optional<uint64_t> AMDGPUMCCodeEmitter::getLitEncoding(
int64_t Imm;
if (MO.isExpr()) {
if (!MO.getExpr()->evaluateAsAbsolute(Imm))
return (STI.hasFeature(AMDGPU::Feature64BitLiterals) &&
OpInfo.OperandType == AMDGPU::OPERAND_REG_IMM_INT64)
? 254
: 255;
return AMDGPU::getOperandSize(OpInfo) == 8 ? 254 : 255;
} else {
assert(!MO.isDFPImm());

Expand Down Expand Up @@ -695,11 +692,8 @@ void AMDGPUMCCodeEmitter::getMachineOpValueCommon(
const MCInstrDesc &Desc = MCII.get(MI.getOpcode());
uint32_t Offset = Desc.getSize();
assert(Offset == 4 || Offset == 8);
auto OpType = Desc.operands()[OpNo].OperandType;
MCFixupKind Kind = (STI.hasFeature(AMDGPU::Feature64BitLiterals) &&
Copy link
Contributor Author

Choose a reason for hiding this comment

The reason will be displayed to describe this comment to others. Learn more.

I don't think the test for Feature64BitLiterals was really needed here. If we don't have the feature then we should not have reached here with a 64-bit operand type.

OpType == AMDGPU::OPERAND_REG_IMM_INT64)
? FK_Data_8
: FK_Data_4;
unsigned Size = AMDGPU::getOperandSize(Desc, OpNo);
MCFixupKind Kind = MCFixup::getDataKindForSize(Size);
addFixup(Fixups, Offset, MO.getExpr(), Kind, PCRel);
}

Expand Down