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@yingopq yingopq commented Sep 2, 2025

From clang version 4, mips append new instruction BeqImm and BEQLImmMacro, the second operand of instruction format is imm64:$imm. When Mips process beql $t0, ($t0), 1, it think the second operand was an imm, so match success. Then mips backend process expandBranchImm, check the Operand(1) was not imm, reported failure.
We can strengthen the instruction matching restrictions.

Fixes #151453.

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llvmbot commented Sep 2, 2025

@llvm/pr-subscribers-backend-mips

Author: None (yingopq)

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From clang version 4, mips append new instruction BeqImm and BEQLImmMacro, the second operand of instruction format is imm64:$imm. When Mips process beql $t0, ($t0), 1, it think the second operand was an imm, so match success. Then mips backend process expandBranchImm, check the Operand(1) was not imm, reported failure.
We can strengthen the instruction matching restrictions.

Fix #151453.


Full diff: https://github.com/llvm/llvm-project/pull/156413.diff

1 Files Affected:

  • (modified) llvm/lib/Target/Mips/MipsInstrInfo.td (+9-1)
diff --git a/llvm/lib/Target/Mips/MipsInstrInfo.td b/llvm/lib/Target/Mips/MipsInstrInfo.td
index a124e84e9ca5f..0d6fa25fb8025 100644
--- a/llvm/lib/Target/Mips/MipsInstrInfo.td
+++ b/llvm/lib/Target/Mips/MipsInstrInfo.td
@@ -855,7 +855,15 @@ def calltarget  : Operand<iPTR> {
   let PrintMethod = "printJumpOperand";
 }
 
-def imm64: Operand<i64>;
+def ConstantImmAsmOperandClass : AsmOperandClass {
+  let Name = "ConstantImm";
+  let PredicateMethod = "isConstantImm";
+  let RenderMethod = "addImmOperands";
+}
+
+def imm64: Operand<i64> {
+  let ParserMatchClass = ConstantImmAsmOperandClass;
+}
 
 def simm19_lsl2 : Operand<i32> {
   let EncoderMethod = "getSimm19Lsl2Encoding";

@yingopq yingopq force-pushed the Fix_bug_issue_151453 branch from 3d53abf to 4cfe280 Compare September 2, 2025 08:36
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brad0 commented Sep 5, 2025

cc @topperc @s-barannikov

@yingopq yingopq force-pushed the Fix_bug_issue_151453 branch from 4cfe280 to 5c8d18d Compare September 17, 2025 08:59
@yingopq yingopq force-pushed the Fix_bug_issue_151453 branch from 5c8d18d to 5afae40 Compare September 26, 2025 09:40
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yingopq commented Sep 28, 2025

@arsenm Can you help review this pr? This issue has been tested OK in the comments section of the issue.

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Missing test

@yingopq yingopq force-pushed the Fix_bug_issue_151453 branch from 5afae40 to 4928c42 Compare October 10, 2025 07:43
# RUN: not llvm-mc %s -triple=mips -mcpu=mips32 2>&1 | FileCheck %s

# CHECK: error: invalid operand for instruction
beql $t0, ($t0), 1
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This changed at least 2 opcodes, right? Should test all of them (missing bne?)

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Updated.

…ns with --arch=mips

From clang version 4, mips append new instruction BeqImm and
BEQLImm, the second operand format of instruction is imm64:$imm.

1.When Mips process `beql $t0, ($t0), 1`, it think the second operand
was an imm, so match success. Then mips backend process expandBranchImm,
check the second operand `$t0` was not imm, reported asserts.
We can strengthen the second operand matching restrictions.

2.Similarly, when Mips process `beql $t0, (1), 1`, it think the second
was an imm. so match success. Then mips backend process expandBranchImm,
check the third operand `1` was not expression, reported asserts. Permit
the third operand of `beql`  to be imm.

Fix llvm#151453.
@yingopq yingopq force-pushed the Fix_bug_issue_151453 branch from 4928c42 to 9fd2966 Compare October 10, 2025 07:51
@brad0 brad0 enabled auto-merge (squash) October 10, 2025 08:00
@yingopq yingopq disabled auto-merge October 10, 2025 08:07
@yingopq yingopq merged commit 51eee20 into llvm:main Oct 10, 2025
10 of 11 checks passed
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[MC][MIPS]Clang Crashes When Assembling Invalid MIPS beql Instructions with --arch=mips

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