[ARM] Specify hasOneUse for shouldFoldConstantShiftPairToMask

[AZero13]

It should be one use, just like AArch64

[llvmbot]

@llvm/pr-subscribers-backend-arm

Author: AZero13 (AZero13)

Changes

It should be one use, just like AArch64

---

Full diff: https://github.com/llvm/llvm-project/pull/156915.diff

2 Files Affected:

• (modified) llvm/lib/Target/ARM/ARMISelLowering.cpp (+4)
• (added) llvm/test/CodeGen/ARM/ushlsat.ll (+62)

diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index b5c01eafcf108..45918232e3a70 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -13885,6 +13885,10 @@ bool ARMTargetLowering::shouldFoldConstantShiftPairToMask(
            N->getOperand(0).getOpcode() == ISD::SHL)) &&
          "Expected shift-shift mask");
 
+  // Don't allow multiuse shift folding with the same shift amount.
+  if (!N->getOperand(0)->hasOneUse())
+    return false;
+
   if (!Subtarget->isThumb1Only())
     return true;
 
diff --git a/llvm/test/CodeGen/ARM/ushlsat.ll b/llvm/test/CodeGen/ARM/ushlsat.ll
new file mode 100644
index 0000000000000..149e703430c45
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/ushlsat.ll
@@ -0,0 +1,62 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=thumbv7m-eabi  %s -o - | FileCheck %s --check-prefix V7M
+; RUN: llc -mtriple=armv7a-eabi  %s -o -   | FileCheck %s --check-prefix V7A
+; RUN: llc -mtriple=thumbv7a-eabi  %s -o -   | FileCheck %s --check-prefix V7A-T
+; RUN: llc -mtriple=armv6m-eabi  %s -o -   | FileCheck %s --check-prefix V6M
+
+; Do not fold shlsat -> shl.
+define i16 @combine_shlsat_to_shl_no_fold(i16 %x) nounwind {
+; V7M-LABEL: combine_shlsat_to_shl_no_fold:
+; V7M:       @ %bb.0:
+; V7M-NEXT:    movs r1, #0
+; V7M-NEXT:    movt r1, #16383
+; V7M-NEXT:    and.w r0, r1, r0, lsl #14
+; V7M-NEXT:    lsls r1, r0, #3
+; V7M-NEXT:    cmp.w r0, r1, lsr #3
+; V7M-NEXT:    it ne
+; V7M-NEXT:    movne.w r1, #-1
+; V7M-NEXT:    lsrs r0, r1, #16
+; V7M-NEXT:    bx lr
+;
+; V7A-LABEL: combine_shlsat_to_shl_no_fold:
+; V7A:       @ %bb.0:
+; V7A-NEXT:    movw r1, #0
+; V7A-NEXT:    movt r1, #16383
+; V7A-NEXT:    and r0, r1, r0, lsl #14
+; V7A-NEXT:    lsl r1, r0, #3
+; V7A-NEXT:    cmp r0, r1, lsr #3
+; V7A-NEXT:    mvnne r1, #0
+; V7A-NEXT:    lsr r0, r1, #16
+; V7A-NEXT:    bx lr
+;
+; V7A-T-LABEL: combine_shlsat_to_shl_no_fold:
+; V7A-T:       @ %bb.0:
+; V7A-T-NEXT:    movs r1, #0
+; V7A-T-NEXT:    movt r1, #16383
+; V7A-T-NEXT:    and.w r0, r1, r0, lsl #14
+; V7A-T-NEXT:    lsls r1, r0, #3
+; V7A-T-NEXT:    cmp.w r0, r1, lsr #3
+; V7A-T-NEXT:    it ne
+; V7A-T-NEXT:    movne.w r1, #-1
+; V7A-T-NEXT:    lsrs r0, r1, #16
+; V7A-T-NEXT:    bx lr
+;
+; V6M-LABEL: combine_shlsat_to_shl_no_fold:
+; V6M:       @ %bb.0:
+; V6M-NEXT:    lsls r0, r0, #16
+; V6M-NEXT:    lsrs r0, r0, #18
+; V6M-NEXT:    lsls r1, r0, #16
+; V6M-NEXT:    lsls r0, r0, #19
+; V6M-NEXT:    lsrs r2, r0, #3
+; V6M-NEXT:    cmp r1, r2
+; V6M-NEXT:    beq .LBB0_2
+; V6M-NEXT:  @ %bb.1:
+; V6M-NEXT:    movs r0, #0
+; V6M-NEXT:    mvns r0, r0
+; V6M-NEXT:  .LBB0_2:
+; V6M-NEXT:    lsrs r0, r0, #16
+; V6M-NEXT:    bx lr
+  %x2 = lshr i16 %x, 2
+  %tmp = call i16 @llvm.ushl.sat.i16(i16 %x2, i16 3)
+  ret i16 %tmp
+}