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@yozhu yozhu commented Sep 5, 2025

Remove the NZCV save and restore instructions from instrumentation
sequence because the instructions used for getting counter address,
counter increment and stack push/pop won't impact NZCV. And with
this we can use X1 to do counter increment and then the push and
pop of X2 can be removed.

Remove the `NZCV` save and restore instructions from instrumentation sequence
because the instructions used for getting counter address, counter increment
and stack push/pop won't impact `NZCV`. And with this we can use `X1` to do
counter increment and then the push and pop of `X2` can be removed.
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llvmbot commented Sep 5, 2025

@llvm/pr-subscribers-bolt

Author: YongKang Zhu (yozhu)

Changes

Remove the NZCV save and restore instructions from instrumentation
sequence because the instructions used for getting counter address,
counter increment and stack push/pop won't impact NZCV. And with
this we can use X1 to do counter increment and then the push and
pop of X2 can be removed.


Full diff: https://github.com/llvm/llvm-project/pull/156994.diff

1 Files Affected:

  • (modified) bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp (+2-6)
diff --git a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
index fcb645f661ef0..7200cbe611db3 100644
--- a/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
+++ b/bolt/lib/Target/AArch64/AArch64MCPlusBuilder.cpp
@@ -2517,21 +2517,17 @@ class AArch64MCPlusBuilder : public MCPlusBuilder {
   createInstrIncMemory(const MCSymbol *Target, MCContext *Ctx, bool IsLeaf,
                        unsigned CodePointerSize) const override {
     unsigned int I = 0;
-    InstructionListType Instrs(10);
+    InstructionListType Instrs(6);
 
     createPushRegisters(Instrs[I++], AArch64::X0, AArch64::X1);
-    getSystemFlag(Instrs[I++], AArch64::X1);
     InstructionListType Addr = materializeAddress(Target, Ctx, AArch64::X0);
     assert(Addr.size() == 2 && "Invalid Addr size");
     std::copy(Addr.begin(), Addr.end(), Instrs.begin() + I);
     I += Addr.size();
-    storeReg(Instrs[I++], AArch64::X2, AArch64::SP);
-    InstructionListType Insts = createIncMemory(AArch64::X0, AArch64::X2);
+    InstructionListType Insts = createIncMemory(AArch64::X0, AArch64::X1);
     assert(Insts.size() == 2 && "Invalid Insts size");
     std::copy(Insts.begin(), Insts.end(), Instrs.begin() + I);
     I += Insts.size();
-    loadReg(Instrs[I++], AArch64::X2, AArch64::SP);
-    setSystemFlag(Instrs[I++], AArch64::X1);
     createPopRegisters(Instrs[I++], AArch64::X0, AArch64::X1);
     return Instrs;
   }

@yozhu yozhu requested a review from ElvinaYakubova September 9, 2025 00:42
@maksfb maksfb requested a review from yavtuk September 10, 2025 01:02
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yavtuk commented Sep 10, 2025

@yozhu thanks a lot for patch, LGTM

@yozhu
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yozhu commented Sep 10, 2025

@maksfb Thanks for bring this PR to the attention of Alexey!
@yavtuk Thanks for the review!

@yozhu yozhu merged commit 675b01a into llvm:main Sep 10, 2025
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3 participants