Add more generic half tests (NFC)
#157211
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nikic
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Sep 6, 2025
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| ; There is no floating-point type LLVM supports that is large enough to promote bfloat FMA to | ||
| ; without causing double rounding issues. This checks for libcalls to f32/f64 fma and truncating | ||
| ; f32/f64 to bf16. See https://github.com/llvm/llvm-project/issues/131531 |
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I don't think this test is useful. Checking the output for the two (non-experimental) targets that are not BAD (https://llvm.godbolt.org/z/cd6G1nzd7) we see that they're actually also bad, they just don't use libcalls to perform the conversion.
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I've removed the bfloat FMA test.
nikic
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Sep 6, 2025
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If you drop the FMA tests, can you directly add coverage for abs/fneg/copysign to the existing half.ll as part of #156343? I don't want to unnecessary split these "list all target" tests, and as far as I can tell the problem for BPF is any test that emits libcalls, which should no longer be the case after that change.
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#156343 won't fix BPF on it's own, as BPF doesn't currently use |
This is already covered by this RISCV test for example: These cross-target tests are useful for testing the migration to TypeSoftPromoteHalf -- they are not the place to test all possible half-float related issues.
Yes, that's fine. |
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I've removed the |
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@llvm/pr-subscribers-backend-directx Author: None (beetrees) ChangesThis PR expands the generic test coverage for Full diff: https://github.com/llvm/llvm-project/pull/157211.diff 3 Files Affected:
diff --git a/llvm/test/CodeGen/BPF/half.ll b/llvm/test/CodeGen/BPF/half.ll
new file mode 100644
index 0000000000000..a8ed8aa31f400
--- /dev/null
+++ b/llvm/test/CodeGen/BPF/half.ll
@@ -0,0 +1,31 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
+; This is the BPF counterpart to the generic `half.ll` test as BPF has compilation errors on some
+; operations.
+; RUN: llc %s -o - -mtriple=bpfel | FileCheck %s
+
+define half @from_bits(i16 %bits) nounwind {
+; CHECK-LABEL: from_bits:
+; CHECK: # %bb.0:
+; CHECK-NEXT: w0 = w1
+; CHECK-NEXT: exit
+ %f = bitcast i16 %bits to half
+ ret half %f
+}
+
+define i16 @to_bits(half %f) nounwind {
+; CHECK-LABEL: to_bits:
+; CHECK: # %bb.0:
+; CHECK-NEXT: w0 = w1
+; CHECK-NEXT: exit
+ %bits = bitcast half %f to i16
+ ret i16 %bits
+}
+
+define half @check_freeze(half %f) nounwind {
+; CHECK-LABEL: check_freeze:
+; CHECK: # %bb.0:
+; CHECK-NEXT: w0 = w1
+; CHECK-NEXT: exit
+ %t0 = freeze half %f
+ ret half %t0
+}
diff --git a/llvm/test/CodeGen/DirectX/half.ll b/llvm/test/CodeGen/DirectX/half.ll
new file mode 100644
index 0000000000000..6def8de2a6d4b
--- /dev/null
+++ b/llvm/test/CodeGen/DirectX/half.ll
@@ -0,0 +1,21 @@
+; This is the DirectX counterpart to the generic `half.ll` test as DirectX has compilation errors
+; on some operations.
+; RUN: llc %s -o - -mtriple=dxil-pc-shadermodel6.3-library | FileCheck %s
+
+; As this is a graphics target, this just checks that compilation doesn't crash.
+; CHECK: {{.*}}
+
+define half @from_bits(i16 %bits) nounwind {
+ %f = bitcast i16 %bits to half
+ ret half %f
+}
+
+define i16 @to_bits(half %f) nounwind {
+ %bits = bitcast half %f to i16
+ ret i16 %bits
+}
+
+define half @check_freeze(half %f) nounwind {
+ %t0 = freeze half %f
+ ret half %t0
+}
diff --git a/llvm/test/CodeGen/Generic/half.ll b/llvm/test/CodeGen/Generic/half.ll
index ef7bfe2f2d9ce..5bba4be23945b 100644
--- a/llvm/test/CodeGen/Generic/half.ll
+++ b/llvm/test/CodeGen/Generic/half.ll
@@ -4,47 +4,47 @@
; check that here. Additionally do a small handful of smoke tests that work
; well cross-platform.
-; RUN: %if aarch64-registered-target %{ llc %s -o - -mtriple=aarch64-apple-darwin | FileCheck %s --check-prefixes=ALL,CHECK %}
-; RUN: %if aarch64-registered-target %{ llc %s -o - -mtriple=aarch64-pc-windows-msvc | FileCheck %s --check-prefixes=ALL,CHECK %}
-; RUN: %if aarch64-registered-target %{ llc %s -o - -mtriple=aarch64-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK %}
-; RUN: %if aarch64-registered-target %{ llc %s -o - -mtriple=arm64ec-pc-windows-msvc | FileCheck %s --check-prefixes=ALL,CHECK %}
-; RUN: %if amdgpu-registered-target %{ llc %s -o - -mtriple=amdgcn-amd-amdhsa | FileCheck %s --check-prefixes=ALL,CHECK %}
-; RUN: %if arc-registered-target %{ llc %s -o - -mtriple=arc-elf | FileCheck %s --check-prefixes=ALL,CHECK %}
-; RUN: %if arm-registered-target %{ llc %s -o - -mtriple=arm-unknown-linux-gnueabi | FileCheck %s --check-prefixes=ALL,CHECK %}
-; RUN: %if arm-registered-target %{ llc %s -o - -mtriple=thumbv7em-none-eabi | FileCheck %s --check-prefixes=ALL,CHECK %}
-; RUN: %if avr-registered-target %{ llc %s -o - -mtriple=avr-none | FileCheck %s --check-prefixes=ALL,CHECK %}
-; RUN: %if bpf-registered-target %{ llc %s -o - -mtriple=bpfel | FileCheck %s --check-prefixes=ALL,CHECK %}
-; RUN: %if csky-registered-target %{ llc %s -o - -mtriple=csky-unknown-linux-gnuabiv2 | FileCheck %s --check-prefixes=ALL,CHECK %}
-; RUN: %if csky-registered-target %{ llc %s -o - -mtriple=csky-unknown-linux-gnuabiv2 -mcpu=ck860fv -mattr=+hard-float | FileCheck %s --check-prefixes=ALL,BAD %}
-; RUN: %if directx-registered-target %{ llc %s -o - -mtriple=dxil-pc-shadermodel6.3-library | FileCheck %s --check-prefixes=NOCRASH %}
-; RUN: %if hexagon-registered-target %{ llc %s -o - -mtriple=hexagon-unknown-linux-musl | FileCheck %s --check-prefixes=ALL,CHECK %}
-; RUN: %if lanai-registered-target %{ llc %s -o - -mtriple=lanai-unknown-unknown | FileCheck %s --check-prefixes=ALL,CHECK %}
-; RUN: %if loongarch-registered-target %{ llc %s -o - -mtriple=loongarch32-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK %}
-; RUN: %if loongarch-registered-target %{ llc %s -o - -mtriple=loongarch64-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK %}
-; RUN: %if loongarch-registered-target %{ llc %s -o - -mtriple=loongarch64-unknown-linux-gnu -mattr=+f | FileCheck %s --check-prefixes=ALL,CHECK %}
-; RUN: %if m68k-registered-target %{ llc %s -o - -mtriple=m68k-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK %}
-; RUN: %if mips-registered-target %{ llc %s -o - -mtriple=mips-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK %}
-; RUN: %if mips-registered-target %{ llc %s -o - -mtriple=mips64-unknown-linux-gnuabi64 | FileCheck %s --check-prefixes=ALL,CHECK %}
-; RUN: %if mips-registered-target %{ llc %s -o - -mtriple=mips64el-unknown-linux-gnuabi64 | FileCheck %s --check-prefixes=ALL,CHECK %}
-; RUN: %if mips-registered-target %{ llc %s -o - -mtriple=mipsel-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK %}
-; RUN: %if msp430-registered-target %{ llc %s -o - -mtriple=msp430-none-elf | FileCheck %s --check-prefixes=ALL,CHECK %}
-; RUN: %if nvptx-registered-target %{ llc %s -o - -mtriple=nvptx64-nvidia-cuda | FileCheck %s --check-prefixes=NOCRASH %}
-; RUN: %if powerpc-registered-target %{ llc %s -o - -mtriple=powerpc-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,BAD %}
-; RUN: %if powerpc-registered-target %{ llc %s -o - -mtriple=powerpc64-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,BAD %}
-; RUN: %if powerpc-registered-target %{ llc %s -o - -mtriple=powerpc64le-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,BAD %}
-; RUN: %if riscv-registered-target %{ llc %s -o - -mtriple=riscv32-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK %}
-; RUN: %if riscv-registered-target %{ llc %s -o - -mtriple=riscv64-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK %}
-; RUN: %if sparc-registered-target %{ llc %s -o - -mtriple=sparc-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK %}
-; RUN: %if sparc-registered-target %{ llc %s -o - -mtriple=sparc64-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK %}
-; RUN: %if spirv-registered-target %{ llc %s -o - -mtriple=spirv-unknown-unknown | FileCheck %s --check-prefixes=NOCRASH %}
-; RUN: %if systemz-registered-target %{ llc %s -o - -mtriple=s390x-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK %}
-; RUN: %if ve-registered-target %{ llc %s -o - -mtriple=ve-unknown-unknown | FileCheck %s --check-prefixes=ALL,BAD %}
-; RUN: %if webassembly-registered-target %{ llc %s -o - -mtriple=wasm32-unknown-unknown | FileCheck %s --check-prefixes=ALL,BAD %}
-; RUN: %if x86-registered-target %{ llc %s -o - -mtriple=i686-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK %}
-; RUN: %if x86-registered-target %{ llc %s -o - -mtriple=x86_64-pc-windows-msvc | FileCheck %s --check-prefixes=ALL,CHECK %}
-; RUN: %if x86-registered-target %{ llc %s -o - -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK %}
-; RUN: %if xcore-registered-target %{ llc %s -o - -mtriple=xcore-unknown-unknown | FileCheck %s --check-prefixes=ALL,CHECK %}
-; RUN: %if xtensa-registered-target %{ llc %s -o - -mtriple=xtensa-none-elf | FileCheck %s --check-prefixes=ALL,CHECK %}
+; RUN: %if aarch64-registered-target %{ llc %s -o - -mtriple=aarch64-apple-darwin | FileCheck %s --check-prefixes=ALL,CHECK,CHECK-NEG-ABS,CHECK-COPYSIGN %}
+; RUN: %if aarch64-registered-target %{ llc %s -o - -mtriple=aarch64-pc-windows-msvc | FileCheck %s --check-prefixes=ALL,CHECK,CHECK-NEG-ABS,CHECK-COPYSIGN %}
+; RUN: %if aarch64-registered-target %{ llc %s -o - -mtriple=aarch64-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK,CHECK-NEG-ABS,CHECK-COPYSIGN %}
+; RUN: %if aarch64-registered-target %{ llc %s -o - -mtriple=arm64ec-pc-windows-msvc | FileCheck %s --check-prefixes=ALL,CHECK,CHECK-NEG-ABS,CHECK-COPYSIGN %}
+; RUN: %if amdgpu-registered-target %{ llc %s -o - -mtriple=amdgcn-amd-amdhsa | FileCheck %s --check-prefixes=ALL,CHECK,CHECK-NEG-ABS,CHECK-COPYSIGN %}
+; RUN: %if arc-registered-target %{ llc %s -o - -mtriple=arc-elf | FileCheck %s --check-prefixes=ALL,CHECK,BAD-NEG-ABS,BAD-COPYSIGN %}
+; RUN: %if arm-registered-target %{ llc %s -o - -mtriple=arm-unknown-linux-gnueabi | FileCheck %s --check-prefixes=ALL,CHECK,BAD-NEG-ABS,CHECK-COPYSIGN %}
+; RUN: %if arm-registered-target %{ llc %s -o - -mtriple=thumbv7em-none-eabi | FileCheck %s --check-prefixes=ALL,CHECK,BAD-NEG-ABS,CHECK-COPYSIGN %}
+; RUN: %if avr-registered-target %{ llc %s -o - -mtriple=avr-none | FileCheck %s --check-prefixes=ALL,CHECK,BAD-NEG-ABS,CHECK-COPYSIGN %}
+; BPF errors on some operations, so has its own separate `half.ll` test.
+; RUN: %if csky-registered-target %{ llc %s -o - -mtriple=csky-unknown-linux-gnuabiv2 | FileCheck %s --check-prefixes=ALL,CHECK,BAD-NEG-ABS,BAD-COPYSIGN %}
+; RUN: %if csky-registered-target %{ llc %s -o - -mtriple=csky-unknown-linux-gnuabiv2 -mcpu=ck860fv -mattr=+hard-float | FileCheck %s --check-prefixes=ALL,BAD,BAD-NEG-ABS,BAD-COPYSIGN %}
+; DirectX errors on some operations, so has its own separate `half.ll` test.
+; RUN: %if hexagon-registered-target %{ llc %s -o - -mtriple=hexagon-unknown-linux-musl | FileCheck %s --check-prefixes=ALL,CHECK,BAD-NEG-ABS,CHECK-COPYSIGN %}
+; RUN: %if lanai-registered-target %{ llc %s -o - -mtriple=lanai-unknown-unknown | FileCheck %s --check-prefixes=ALL,CHECK,BAD-NEG-ABS,BAD-COPYSIGN %}
+; RUN: %if loongarch-registered-target %{ llc %s -o - -mtriple=loongarch32-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK,BAD-NEG-ABS,CHECK-COPYSIGN %}
+; RUN: %if loongarch-registered-target %{ llc %s -o - -mtriple=loongarch64-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK,BAD-NEG-ABS,CHECK-COPYSIGN %}
+; RUN: %if loongarch-registered-target %{ llc %s -o - -mtriple=loongarch64-unknown-linux-gnu -mattr=+f | FileCheck %s --check-prefixes=ALL,CHECK,BAD-NEG-ABS,CHECK-COPYSIGN %}
+; RUN: %if m68k-registered-target %{ llc %s -o - -mtriple=m68k-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK,BAD-NEG-ABS,BAD-COPYSIGN %}
+; RUN: %if mips-registered-target %{ llc %s -o - -mtriple=mips-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK,BAD-NEG-ABS,CHECK-COPYSIGN %}
+; RUN: %if mips-registered-target %{ llc %s -o - -mtriple=mips64-unknown-linux-gnuabi64 | FileCheck %s --check-prefixes=ALL,CHECK,BAD-NEG-ABS,CHECK-COPYSIGN %}
+; RUN: %if mips-registered-target %{ llc %s -o - -mtriple=mips64el-unknown-linux-gnuabi64 | FileCheck %s --check-prefixes=ALL,CHECK,BAD-NEG-ABS,CHECK-COPYSIGN %}
+; RUN: %if mips-registered-target %{ llc %s -o - -mtriple=mipsel-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK,BAD-NEG-ABS,CHECK-COPYSIGN %}
+; RUN: %if msp430-registered-target %{ llc %s -o - -mtriple=msp430-none-elf | FileCheck %s --check-prefixes=ALL,CHECK,BAD-NEG-ABS,BAD-COPYSIGN %}
+; RUN: %if nvptx-registered-target %{ llc %s -o - -mtriple=nvptx64-nvidia-cuda | FileCheck %s --check-prefixes=NOCRASH %}
+; RUN: %if powerpc-registered-target %{ llc %s -o - -mtriple=powerpc-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,BAD,BAD-NEG-ABS,BAD-COPYSIGN %}
+; RUN: %if powerpc-registered-target %{ llc %s -o - -mtriple=powerpc64-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,BAD,BAD-NEG-ABS,BAD-COPYSIGN %}
+; RUN: %if powerpc-registered-target %{ llc %s -o - -mtriple=powerpc64le-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,BAD,BAD-NEG-ABS,BAD-COPYSIGN %}
+; RUN: %if riscv-registered-target %{ llc %s -o - -mtriple=riscv32-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK,BAD-NEG-ABS,CHECK-COPYSIGN %}
+; RUN: %if riscv-registered-target %{ llc %s -o - -mtriple=riscv64-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK,BAD-NEG-ABS,CHECK-COPYSIGN %}
+; RUN: %if sparc-registered-target %{ llc %s -o - -mtriple=sparc-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK,BAD-NEG-ABS,CHECK-COPYSIGN %}
+; RUN: %if sparc-registered-target %{ llc %s -o - -mtriple=sparc64-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK,BAD-NEG-ABS,CHECK-COPYSIGN %}
+; RUN: %if spirv-registered-target %{ llc %s -o - -mtriple=spirv-unknown-unknown | FileCheck %s --check-prefixes=NOCRASH %}
+; RUN: %if systemz-registered-target %{ llc %s -o - -mtriple=s390x-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK,CHECK-NEG-ABS,CHECK-COPYSIGN %}
+; RUN: %if ve-registered-target %{ llc %s -o - -mtriple=ve-unknown-unknown | FileCheck %s --check-prefixes=ALL,BAD,BAD-NEG-ABS,BAD-COPYSIGN %}
+; RUN: %if webassembly-registered-target %{ llc %s -o - -mtriple=wasm32-unknown-unknown | FileCheck %s --check-prefixes=ALL,BAD,BAD-NEG-ABS,BAD-COPYSIGN %}
+; RUN: %if x86-registered-target %{ llc %s -o - -mtriple=i686-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK,CHECK-NEG-ABS,CHECK-COPYSIGN %}
+; RUN: %if x86-registered-target %{ llc %s -o - -mtriple=x86_64-pc-windows-msvc | FileCheck %s --check-prefixes=ALL,CHECK,CHECK-NEG-ABS,CHECK-COPYSIGN %}
+; RUN: %if x86-registered-target %{ llc %s -o - -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefixes=ALL,CHECK,CHECK-NEG-ABS,CHECK-COPYSIGN %}
+; RUN: %if xcore-registered-target %{ llc %s -o - -mtriple=xcore-unknown-unknown | FileCheck %s --check-prefixes=ALL,CHECK,BAD-NEG-ABS,BAD-COPYSIGN %}
+; RUN: %if xtensa-registered-target %{ llc %s -o - -mtriple=xtensa-none-elf | FileCheck %s --check-prefixes=ALL,CHECK,BAD-NEG-ABS,CHECK-COPYSIGN %}
; Note that arm64ec labels are quoted, hence the `{{"?}}:`.
@@ -86,3 +86,47 @@ define half @check_freeze(half %f) nounwind {
%t0 = freeze half %f
ret half %t0
}
+
+; fneg, fabs and copysign all need to not quieten signalling NaNs, so should not call any conversion functions which do.
+; These tests won't catch cases where the everything is done using native instructions instead of builtins.
+; See https://github.com/llvm/llvm-project/issues/104915
+
+define void @test_fneg(ptr %p1, ptr %p2) #0 {
+; ALL-LABEL: test_fneg{{"?}}:
+; CHECK-NEG-ABS-NOT: __extend
+; CHECK-NEG-ABS-NOT: __trunc
+; CHECK-NEG-ABS-NOT: __gnu
+; CHECK-NEG-ABS-NOT: __aeabi
+; BAD-NEG-ABS: {{__extendhfsf2|__gnu_h2f_ieee|__aeabi_h2f}}
+ %v = load half, ptr %p1
+ %res = fneg half %v
+ store half %res, ptr %p2
+ ret void
+}
+
+define void @test_fabs(ptr %p1, ptr %p2) {
+; ALL-LABEL: test_fabs{{"?}}:
+; CHECK-NEG-ABS-NOT: __extend
+; CHECK-NEG-ABS-NOT: __trunc
+; CHECK-NEG-ABS-NOT: __gnu
+; CHECK-NEG-ABS-NOT: __aeabi
+; BAD-NEG-ABS: {{__extendhfsf2|__gnu_h2f_ieee|__aeabi_h2f}}
+ %a = load half, ptr %p1
+ %r = call half @llvm.fabs.f16(half %a)
+ store half %r, ptr %p2
+ ret void
+}
+
+define void @test_copysign(ptr %p1, ptr %p2, ptr %p3) {
+; ALL-LABEL: test_copysign{{"?}}:
+; CHECK-COPYSIGN-NOT: __extend
+; CHECK-COPYSIGN-NOT: __trunc
+; CHECK-COPYSIGN-NOT: __gnu
+; CHECK-COPYSIGN-NOT: __aeabi
+; BAD-COPYSIGN: {{__extendhfsf2|__gnu_h2f_ieee}}
+ %a = load half, ptr %p1
+ %b = load half, ptr %p2
+ %r = call half @llvm.copysign.f16(half %a, half %b)
+ store half %r, ptr %p3
+ ret void
+}
|
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half/bfloat tests (NFC)half tests (NFC)
nikic
reviewed
Sep 12, 2025
| ; CHECK-NEXT: w0 = w1 | ||
| ; CHECK-NEXT: exit | ||
| %f = bitcast i16 %bits to half | ||
| ret half %f |
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Indentation mismatch between first two and last function.
| ; RUN: llc %s -o - -mtriple=dxil-pc-shadermodel6.3-library | FileCheck %s | ||
|
|
||
| ; As this is a graphics target, this just checks that compilation doesn't crash. | ||
| ; CHECK: {{.*}} |
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As this has a dedicated test now and doesn't need to have the same check lines as other targets, might as well check the output?
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This PR expands the generic test coverage for
halfto includefneg,fabs,copysignandfma, and adds equivalent test coverage forbfloat. This will make it easier to track progress towards fixing issues like #104915 and #98389. Prerequisite for #156343.