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[clang] VectorExprEvaluator::VisitCallExpr - add constant folding for X86 pslldqi/psrldqi infrinsics #157403
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[clang] VectorExprEvaluator::VisitCallExpr - add constant folding for X86 pslldqi/psrldqi infrinsics #157403
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@llvm/pr-subscribers-clang Author: None (kimyounhoex1) ChangesThese X86 builtins ( This improves consistency with other vector shift intrinsics and Fixes #156494 Full diff: https://github.com/llvm/llvm-project/pull/157403.diff 1 Files Affected:
diff --git a/clang/lib/AST/ExprConstant.cpp b/clang/lib/AST/ExprConstant.cpp
index b4f1e76187e25..2b06705a4870c 100644
--- a/clang/lib/AST/ExprConstant.cpp
+++ b/clang/lib/AST/ExprConstant.cpp
@@ -12039,6 +12039,71 @@ bool VectorExprEvaluator::VisitCallExpr(const CallExpr *E) {
}
return Success(APValue(ResultElements.data(), ResultElements.size()), E);
}
+ case X86::BI__builtin_ia32_pslldqi128_byteshift:
+ case X86::BI__builtin_ia32_psrldqi128_byteshift: {
+ unsigned BuiltinID = E->getBuiltinCallee();
+
+ APSInt Amt;
+ if (!EvaluateInteger(E->getArg(1), Amt, Info))
+ break;
+ unsigned Shift = (unsigned)Amt.getZExtValue();
+
+ APValue Vec;
+ if (!Evaluate(Vec, Info, E->getArg(0)) || !Vec.isVector())
+ break;
+
+ SmallVector<APValue, 16> ResultElements;
+ ResultElements.reserve(16);
+
+ bool isLeft = (BuiltinID == X86::BI__builtin_ia32_pslldqi128_byteshift);
+
+ for (unsigned i = 0; i < 16; i++) {
+ int SrcIdx = -1;
+ if (isLeft)
+ SrcIdx = i + Shift;
+ else if (i >= Shift)
+ SrcIdx = i - Shift;
+
+ if (SrcIdx >= 0 && (unsigned)SrcIdx < 16)
+ ResultElements.push_back(Vec.getVectorElt(SrcIdx));
+ else
+ ResultElements.push_back(APValue(0));
+ }
+ return Success(APValue(ResultElements.data(), ResultElements.size()), E);
+ }
+
+ case X86::BI__builtin_ia32_pslldqi256_byteshift:
+ case X86::BI__builtin_ia32_psrldqi256_byteshift: {
+ unsigned BuiltinID = E->getBuiltinCallee();
+
+ APSInt Amt;
+ if (!EvaluateInteger(E->getArg(1), Amt, Info))
+ break;
+ unsigned Shift = (unsigned)Amt.getZExtValue();
+
+ APValue Vec;
+ if (!Evaluate(Vec, Info, E->getArg(0)) || !Vec.isVector())
+ break;
+
+ SmallVector<APValue, 32> ResultElements;
+ ResultElements.reserve(32);
+
+ bool isLeft = (BuiltinID == X86::BI__builtin_ia32_pslldqi256_byteshift);
+
+ for (unsigned i = 0; i < 32; i++) {
+ int SrcIdx = -1;
+ if (isLeft)
+ SrcIdx = i + Shift;
+ else if (i >= Shift)
+ SrcIdx = i - Shift;
+
+ if (SrcIdx >= 0 && (unsigned)SrcIdx < 32)
+ ResultElements.push_back(Vec.getVectorElt(SrcIdx));
+ else
+ ResultElements.push_back(APValue(0));
+ }
+ return Success(APValue(ResultElements.data(), ResultElements.size()), E);
+ }
}
}
|
Hi @RKSimon, just kindly pinging this PR |
Will take a look - sorry I missed this (unfortunately github is terrible with notifications for contributions from non project members) - CC'ing me is the best way so it appears in my github mentioned tab |
Understood, I’ll keep that in mind next time. |
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test coverage? they need adding to sse2-builtins.c and avx2-builtins.c
clang/lib/AST/ExprConstant.cpp
Outdated
SrcIdx = i - Shift; | ||
|
||
if (SrcIdx >= 0 && (unsigned)SrcIdx < 16) | ||
ResultElements.push_back(Vec.getVectorElt(SrcIdx)); |
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This isn't going to work as currently the intrinsics take <X x long long int>
types - we're going to have to change these to <8X x char>
types to make this a lot easier to deal with - see the palignr builtins for an example
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I’m done with this one, could you please check one more?
…ing for X86 psllDqi/psrlDqi intrinsics feat(exprconst): branch statement handling
… X86 pslldqi/psrldqi infrinsics
… X86 pslldqi/psrldqi infrinsics
… X86 pslldqi/psrldqi infrinsics
…ing for X86 pslldqi/psrldqi infrinsics
✅ With the latest revision this PR passed the C/C++ code formatter. |
… X86 pslldqi/psrldqi infrinsics
… X86 pslldqi/psrldqi infrinsics
These X86 builtins (
__builtin_ia32_pslldqi128/256_byteshift
and__builtin_ia32_psrldqi128/256_byteshift
) can now be evaluated atcompile time when the shift amount is a constant integer.
This improves consistency with other vector shift intrinsics and
reduces unnecessary runtime evaluation.
Fixes #156494