[X86] PromoteMaskArithmetic - use similar code for LHS/RHS trunc pattern. NFC. #157426
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…ern. NFC. Make it more obvious that LHS/RHS truncation patterns are the same. Noticed while working on llvm#157425
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@llvm/pr-subscribers-backend-x86 Author: Simon Pilgrim (RKSimon) ChangesMake it more obvious that LHS/RHS truncation patterns are the same. Noticed while working on #157425 Full diff: https://github.com/llvm/llvm-project/pull/157426.diff 1 Files Affected:
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index cdc97faf394ca..15b59afabc61f 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -50957,15 +50957,13 @@ static SDValue PromoteMaskArithmetic(SDValue N, const SDLoc &DL, EVT VT,
if (SDValue NN0 = PromoteMaskArithmetic(N0, DL, VT, DAG, Depth + 1))
N0 = NN0;
else {
- // The left side has to be a trunc.
- if (N0.getOpcode() != ISD::TRUNCATE)
- return SDValue();
-
- // The type of the truncated inputs.
- if (N0.getOperand(0).getValueType() != VT)
+ // The left side has to be a 'trunc'.
+ bool LHSTrunc = N0.getOpcode() == ISD::TRUNCATE &&
+ N0.getOperand(0).getValueType() == VT;
+ if (LHSTrunc)
+ N0 = N0.getOperand(0);
+ else
return SDValue();
-
- N0 = N0.getOperand(0);
}
if (SDValue NN1 = PromoteMaskArithmetic(N1, DL, VT, DAG, Depth + 1))
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LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/116/builds/18034 Here is the relevant piece of the build log for the reference |
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Make it more obvious that LHS/RHS truncation patterns are the same.
Noticed while working on #157425