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[RISCV] Add helper method for checking for Zicond or XVentanaCondOps. NFC #157891

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Merged
merged 2 commits into from
Sep 10, 2025
Merged

[RISCV] Add helper method for checking for Zicond or XVentanaCondOps. NFC #157891

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cfe2fab
[RISCV] Add helper method for checking for Zicond or XVentanaCondOps.…
topperc Sep 10, 2025
f3820af
fixup! fix typo
topperc Sep 10, 2025
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16 changes: 5 additions & 11 deletions llvm/lib/Target/RISCV/RISCVISelLowering.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -9141,9 +9141,7 @@ static SDValue lowerSelectToBinOp(SDNode *N, SelectionDAG &DAG,
return DAG.getNode(ISD::OR, DL, VT, Neg, DAG.getFreeze(TrueV));
}

const bool HasCZero =
VT.isScalarInteger() &&
(Subtarget.hasStdExtZicond() || Subtarget.hasVendorXVentanaCondOps());
const bool HasCZero = VT.isScalarInteger() && Subtarget.hasCZEROLike();

// (select c, 0, y) -> (c-1) & y
if (isNullConstant(TrueV) && (!HasCZero || isSimm12Constant(FalseV))) {
Expand Down Expand Up @@ -9281,8 +9279,7 @@ SDValue RISCVTargetLowering::lowerSELECT(SDValue Op, SelectionDAG &DAG) const {
// nodes to implement the SELECT. Performing the lowering here allows for
// greater control over when CZERO_{EQZ/NEZ} are used vs another branchless
// sequence or RISCVISD::SELECT_CC node (branch-based select).
if ((Subtarget.hasStdExtZicond() || Subtarget.hasVendorXVentanaCondOps()) &&
VT.isScalarInteger()) {
if (Subtarget.hasCZEROLike() && VT.isScalarInteger()) {

// (select c, t, 0) -> (czero_eqz t, c)
if (isNullConstant(FalseV))
Expand Down Expand Up @@ -15487,9 +15484,7 @@ static SDValue combineSelectAndUse(SDNode *N, SDValue Slct, SDValue OtherOp,

if (!Subtarget.hasConditionalMoveFusion()) {
// (select cond, x, (and x, c)) has custom lowering with Zicond.
if ((!Subtarget.hasStdExtZicond() &&
!Subtarget.hasVendorXVentanaCondOps()) ||
N->getOpcode() != ISD::AND)
if (!Subtarget.hasCZEROLike() || N->getOpcode() != ISD::AND)
return SDValue();

// Maybe harmful when condition code has multiple use.
Expand Down Expand Up @@ -18953,8 +18948,7 @@ static SDValue useInversedSetcc(SDNode *N, SelectionDAG &DAG,
// Replace (setcc eq (and x, C)) with (setcc ne (and x, C))) to generate
// BEXTI, where C is power of 2.
if (Subtarget.hasStdExtZbs() && VT.isScalarInteger() &&
(Subtarget.hasStdExtZicond() || Subtarget.hasVendorXVentanaCondOps() ||
Subtarget.hasVendorXTHeadCondMov())) {
(Subtarget.hasCZEROLike() || Subtarget.hasVendorXTHeadCondMov())) {
SDValue LHS = Cond.getOperand(0);
SDValue RHS = Cond.getOperand(1);
ISD::CondCode CC = cast<CondCodeSDNode>(Cond.getOperand(2))->get();
Expand Down Expand Up @@ -24938,7 +24932,7 @@ RISCVTargetLowering::BuildSDIVPow2(SDNode *N, const APInt &Divisor,

bool RISCVTargetLowering::shouldFoldSelectWithSingleBitTest(
EVT VT, const APInt &AndMask) const {
if (Subtarget.hasStdExtZicond() || Subtarget.hasVendorXVentanaCondOps())
if (Subtarget.hasCZEROLike())
return !Subtarget.hasStdExtZbs() && AndMask.ugt(1024);
return TargetLowering::shouldFoldSelectWithSingleBitTest(VT, AndMask);
}
Expand Down
4 changes: 4 additions & 0 deletions llvm/lib/Target/RISCV/RISCVSubtarget.h
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Expand Up @@ -186,6 +186,10 @@ class RISCVSubtarget : public RISCVGenSubtargetInfo {
return HasStdExtZfhmin || HasStdExtZfbfmin;
}

bool hasCZEROLike() const {
return HasStdExtZicond || HasVendorXVentanaCondOps;
}

bool hasConditionalMoveFusion() const {
// Do we support fusing a branch+mv or branch+c.mv as a conditional move.
return (hasConditionalCompressedMoveFusion() && hasStdExtZca()) ||
Expand Down