AMDGPU: Remove unnecessary AGPR legalize logic #159491
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The manual legalizeOperands code only need to consider cases that require full instruction context to know if the operand is legal. This does not need to handle basic operand register class constraints.
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@llvm/pr-subscribers-backend-amdgpu Author: Matt Arsenault (arsenm) ChangesThe manual legalizeOperands code only need to consider cases that Full diff: https://github.com/llvm/llvm-project/pull/159491.diff 1 Files Affected:
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index a737ad98c1d80..3847a73b0a497 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -6371,13 +6371,6 @@ void SIInstrInfo::legalizeOperandsVOP2(MachineRegisterInfo &MRI,
return;
}
- // No VOP2 instructions support AGPRs.
- if (Src0.isReg() && RI.isAGPR(MRI, Src0.getReg()))
- legalizeOpWithMove(MI, Src0Idx);
-
- if (Src1.isReg() && RI.isAGPR(MRI, Src1.getReg()))
- legalizeOpWithMove(MI, Src1Idx);
-
// Special case: V_FMAC_F32 and V_FMAC_F16 have src2.
if (Opc == AMDGPU::V_FMAC_F32_e32 || Opc == AMDGPU::V_FMAC_F16_e32) {
int Src2Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::src2);
@@ -6518,12 +6511,6 @@ void SIInstrInfo::legalizeOperandsVOP3(MachineRegisterInfo &MRI,
continue;
}
- if (RI.hasAGPRs(RI.getRegClassForReg(MRI, MO.getReg())) &&
- !isOperandLegal(MI, Idx, &MO)) {
- legalizeOpWithMove(MI, Idx);
- continue;
- }
-
if (!RI.isSGPRClass(RI.getRegClassForReg(MRI, MO.getReg())))
continue; // VGPRs are legal
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rampitec
approved these changes
Sep 18, 2025
arsenm
deleted the
users/arsenm/amdgpu/remove-unnecessary-agpr-operand-legalize
branch
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LLVM Buildbot has detected a new failure on builder Full details are available at: https://lab.llvm.org/buildbot/#/builders/154/builds/21681 Here is the relevant piece of the build log for the reference |
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The manual legalizeOperands code only need to consider cases that
require full instruction context to know if the operand is legal.
This does not need to handle basic operand register class constraints.