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[SPIRV] Added Packed Vector Format for SPV_KHR_integer_dot_product #160088

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Merged
merged 2 commits into from
Sep 23, 2025
+45 −10
Merged

[SPIRV] Added Packed Vector Format for SPV_KHR_integer_dot_product #160088

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ff7c38e
Added Packed Vector Format for Integer dot product
EbinJose2002 Jul 24, 2025
410e204
Merge branch 'main' into integer_dot_pdt
EbinJose2002 Sep 22, 2025
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15 changes: 15 additions & 0 deletions llvm/lib/Target/SPIRV/MCTargetDesc/SPIRVInstPrinter.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -269,6 +269,21 @@ void SPIRVInstPrinter::printInst(const MCInst *MI, uint64_t Address,
}
break;
}
case SPIRV::OpSDot:
case SPIRV::OpUDot:
case SPIRV::OpSUDot:
case SPIRV::OpSDotAccSat:
case SPIRV::OpUDotAccSat:
case SPIRV::OpSUDotAccSat: {
const unsigned NumOps = MI->getNumOperands();
if (NumOps > NumFixedOps) {
OS << ' ';
printSymbolicOperand<OperandCategory::PackedVectorFormatsOperand>(
MI, NumOps - 1, OS);
break;
}
break;
}
default:
printRemainingVariableOps(MI, NumFixedOps, OS);
break;
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2 changes: 1 addition & 1 deletion llvm/lib/Target/SPIRV/SPIRVBuiltins.cpp
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Expand Up @@ -1778,7 +1778,7 @@ static bool generateDotOrFMulInst(const StringRef DemangledCall,
// Add Packed Vector Format for Integer dot product builtins if arguments are
// scalar
if (!IsVec && OC != SPIRV::OpFMulS)
MIB.addImm(0);
MIB.addImm(SPIRV::PackedVectorFormat4x8Bit);

return true;
}
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20 changes: 20 additions & 0 deletions llvm/lib/Target/SPIRV/SPIRVSymbolicOperands.td
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Expand Up @@ -211,6 +211,7 @@ def CooperativeMatrixOperandsOperand : OperandCategory;
def SpecConstantOpOperandsOperand : OperandCategory;
def MatrixMultiplyAccumulateOperandsOperand : OperandCategory;
def FPEncodingOperand : OperandCategory;
def PackedVectorFormatsOperand : OperandCategory;

//===----------------------------------------------------------------------===//
// Definition of the Environments
Expand Down Expand Up @@ -2026,3 +2027,22 @@ multiclass FPEncodingOperand<bits<32> value, list<Extension> reqExtensions>{
}

defm BFloat16KHR : FPEncodingOperand<0, [SPV_KHR_bfloat16]>;

def PackedVectorFormats : GenericEnum, Operand<i32> {
let FilterClass = "PackedVectorFormats";
let NameField = "Name";
let ValueField = "Value";
let PrintMethod = !strconcat("printSymbolicOperand<OperandCategory::", FilterClass, "Operand>");
}

class PackedVectorFormats<string name, bits<32> value> {
string Name = name;
bits<32> Value = value;
}

multiclass PackedVectorFormatsOperand<bits<32> value, list<Extension> reqExtensions> {
def NAME : BuiltIn<NAME, value>;
defm : SymbolicOperandWithRequirements<PackedVectorFormatsOperand, value, NAME, 0, 0, reqExtensions, [], []>;
}

defm PackedVectorFormat4x8Bit : PackedVectorFormatsOperand<0, [SPV_KHR_integer_dot_product]>;
18 changes: 9 additions & 9 deletions ...PIRV/extensions/SPV_KHR_integer_dot_product/SPV_KHR_integer_dot_product_OCLtoSPIRV_int.ll
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Expand Up @@ -13,15 +13,15 @@
; CHECK: Name %[[#SignedB:]] "ib"
; CHECK: Name %[[#UnsignedB:]] "ub"

; CHECK: SDot %[[#]] %[[#SignedA]] %[[#SignedB]] 0
; CHECK: SUDot %[[#]] %[[#SignedA]] %[[#UnsignedB]] 0
; CHECK: SUDot %[[#]] %[[#SignedB]] %[[#UnsignedA]] 0
; CHECK: UDot %[[#]] %[[#UnsignedA]] %[[#UnsignedB]] 0

; CHECK: SDotAccSat %[[#]] %[[#SignedA]] %[[#SignedB]] %[[#]] 0
; CHECK: SUDotAccSat %[[#]] %[[#SignedA]] %[[#UnsignedB]] %[[#]] 0
; CHECK: SUDotAccSat %[[#]] %[[#SignedB]] %[[#UnsignedA]] %[[#]] 0
; CHECK: UDotAccSat %[[#]] %[[#UnsignedA]] %[[#UnsignedB]] %[[#]] 0
; CHECK: SDot %[[#]] %[[#SignedA]] %[[#SignedB]] PackedVectorFormat4x8Bit
; CHECK: SUDot %[[#]] %[[#SignedA]] %[[#UnsignedB]] PackedVectorFormat4x8Bit
; CHECK: SUDot %[[#]] %[[#SignedB]] %[[#UnsignedA]] PackedVectorFormat4x8Bit
; CHECK: UDot %[[#]] %[[#UnsignedA]] %[[#UnsignedB]] PackedVectorFormat4x8Bit

; CHECK: SDotAccSat %[[#]] %[[#SignedA]] %[[#SignedB]] %[[#]] PackedVectorFormat4x8Bit
; CHECK: SUDotAccSat %[[#]] %[[#SignedA]] %[[#UnsignedB]] %[[#]] PackedVectorFormat4x8Bit
; CHECK: SUDotAccSat %[[#]] %[[#SignedB]] %[[#UnsignedA]] %[[#]] PackedVectorFormat4x8Bit
; CHECK: UDotAccSat %[[#]] %[[#UnsignedA]] %[[#UnsignedB]] %[[#]] PackedVectorFormat4x8Bit

define spir_kernel void @test(i32 %ia, i32 %ua, i32 %ib, i32 %ub, i32 %ires, i32 %ures) {
entry:
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