[AMDGPU] Fix sub-dword atomic flat saddr store with no D16. NFCI #160253
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The pattern does not factor saddr. There is no way to write a test
for it because gfx1200 does not have sram-ecc but also no saddr,
and gfx1250 does not fall into this preserving category while has
sram-ecc. Nevertheless, the day we could fix it that would become a
problem. For now it is OK that change does not fail.
That was untested before and it is untested now, but at least t16
block uses t16 patterns.