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[X86] Invalid fp16 comparison fix #160304

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Merged
merged 5 commits into from
Sep 23, 2025
Merged

[X86] Invalid fp16 comparison fix #160304

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90a477c
Add pr159723.ll test with invalid comparison
azwolski Sep 19, 2025
2d4c39e
[X86] Rename _rev to _commute
azwolski Sep 22, 2025
6387c24
Support masked VCMPPHZ instruction cases in commuteInstructionImpl an…
azwolski Sep 1, 2025
2bf1f6f
[X86] Update llc test checks for pr159723.ll
azwolski Sep 23, 2025
fc826dd
Merge branch 'main' into invalid-fp16-comparison-fix
azwolski Sep 23, 2025
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8 changes: 7 additions & 1 deletion llvm/lib/Target/X86/X86InstrInfo.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -2573,10 +2573,13 @@ MachineInstr *X86InstrInfo::commuteInstructionImpl(MachineInstr &MI, bool NewMI,
case X86::VCMPPSZ256rri:
case X86::VCMPPDZrrik:
case X86::VCMPPSZrrik:
case X86::VCMPPHZrrik:
case X86::VCMPPDZ128rrik:
case X86::VCMPPSZ128rrik:
case X86::VCMPPHZ128rrik:
case X86::VCMPPDZ256rrik:
case X86::VCMPPSZ256rrik:
case X86::VCMPPHZ256rrik:
WorkingMI = CloneIfNew(MI);
WorkingMI->getOperand(MI.getNumExplicitOperands() - 1)
.setImm(X86::getSwappedVCMPImm(
Expand Down Expand Up @@ -2830,10 +2833,13 @@ bool X86InstrInfo::findCommutedOpIndices(const MachineInstr &MI,
case X86::VCMPPSZ256rri:
case X86::VCMPPDZrrik:
case X86::VCMPPSZrrik:
case X86::VCMPPHZrrik:
case X86::VCMPPDZ128rrik:
case X86::VCMPPSZ128rrik:
case X86::VCMPPHZ128rrik:
case X86::VCMPPDZ256rrik:
case X86::VCMPPSZ256rrik: {
case X86::VCMPPSZ256rrik:
case X86::VCMPPHZ256rrik: {
unsigned OpOffset = X86II::isKMasked(Desc.TSFlags) ? 1 : 0;

// Float comparison can be safely commuted for
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/X86/pr159723.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@ define <8 x i1> @test_cmp_v8half_ogt(<8 x half> %rhs, <8 x i1> %mask) nounwind {
; CHECK-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) # 2-byte Spill
; CHECK-NEXT: callq test_call_8@PLT
; CHECK-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k1 # 2-byte Reload
; CHECK-NEXT: vcmpltph {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %k0 {%k1} # 16-byte Folded Reload
; CHECK-NEXT: vcmpgtph {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %k0 {%k1} # 16-byte Folded Reload
; CHECK-NEXT: vpmovm2w %k0, %xmm0
; CHECK-NEXT: addq $40, %rsp
; CHECK-NEXT: retq
Expand Down Expand Up @@ -79,7 +79,7 @@ define <16 x i1> @test_cmp_v16half_olt_commute(<16 x half> %rhs, <16 x i1> %mask
; CHECK-NEXT: kmovw %k1, {{[-0-9]+}}(%r{{[sb]}}p) # 2-byte Spill
; CHECK-NEXT: callq test_call_16@PLT
; CHECK-NEXT: kmovw {{[-0-9]+}}(%r{{[sb]}}p), %k1 # 2-byte Reload
; CHECK-NEXT: vcmpltph {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %k0 {%k1} # 32-byte Folded Reload
; CHECK-NEXT: vcmpgtph {{[-0-9]+}}(%r{{[sb]}}p), %ymm0, %k0 {%k1} # 32-byte Folded Reload
; CHECK-NEXT: vpmovm2b %k0, %xmm0
; CHECK-NEXT: addq $56, %rsp
; CHECK-NEXT: vzeroupper
Expand All @@ -100,7 +100,7 @@ define <32 x i1> @test_cmp_v32half_oge(<32 x half> %rhs, <32 x i1> %mask) nounwi
; CHECK-NEXT: kmovd %k1, {{[-0-9]+}}(%r{{[sb]}}p) # 4-byte Spill
; CHECK-NEXT: callq test_call_32@PLT
; CHECK-NEXT: kmovd {{[-0-9]+}}(%r{{[sb]}}p), %k1 # 4-byte Reload
; CHECK-NEXT: vcmpleph {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %k0 {%k1} # 64-byte Folded Reload
; CHECK-NEXT: vcmpgeph {{[-0-9]+}}(%r{{[sb]}}p), %zmm0, %k0 {%k1} # 64-byte Folded Reload
; CHECK-NEXT: vpmovm2b %k0, %ymm0
; CHECK-NEXT: addq $88, %rsp
; CHECK-NEXT: retq
Expand Down