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[ARM] Consider denormal mode in ARMSubtarget #160456

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Sep 24, 2025
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[ARM] Consider denormal mode in ARMSubtarget #160456

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9e268b4
[ARM] Consider denormal mode in `ARMSubtarget`
paperchalice Sep 24, 2025
e857ba6
address comment
paperchalice Sep 24, 2025
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15 changes: 7 additions & 8 deletions llvm/lib/Target/ARM/ARMSubtarget.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -88,18 +88,16 @@ ARMFrameLowering *ARMSubtarget::initializeFrameLowering(StringRef CPU,
ARMSubtarget::ARMSubtarget(const Triple &TT, const std::string &CPU,
const std::string &FS,
const ARMBaseTargetMachine &TM, bool IsLittle,
bool MinSize)
bool MinSize, DenormalMode DM)
: ARMGenSubtargetInfo(TT, CPU, /*TuneCPU*/ CPU, FS),
UseMulOps(UseFusedMulOps), CPUString(CPU), OptMinSize(MinSize),
IsLittle(IsLittle), TargetTriple(TT), Options(TM.Options), TM(TM),
IsLittle(IsLittle), DM(DM), TargetTriple(TT), Options(TM.Options), TM(TM),
FrameLowering(initializeFrameLowering(CPU, FS)),
// At this point initializeSubtargetDependencies has been called so
// we can query directly.
InstrInfo(isThumb1Only()
? (ARMBaseInstrInfo *)new Thumb1InstrInfo(*this)
: !isThumb()
? (ARMBaseInstrInfo *)new ARMInstrInfo(*this)
: (ARMBaseInstrInfo *)new Thumb2InstrInfo(*this)),
InstrInfo(isThumb1Only() ? (ARMBaseInstrInfo *)new Thumb1InstrInfo(*this)
: !isThumb() ? (ARMBaseInstrInfo *)new ARMInstrInfo(*this)
: (ARMBaseInstrInfo *)new Thumb2InstrInfo(*this)),
TLInfo(TM, *this) {

CallLoweringInfo.reset(new ARMCallLowering(*getTargetLowering()));
Expand Down Expand Up @@ -224,7 +222,8 @@ void ARMSubtarget::initSubtargetFeatures(StringRef CPU, StringRef FS) {
// NEON f32 ops are non-IEEE 754 compliant. Darwin is ok with it by default.
const FeatureBitset &Bits = getFeatureBits();
if ((Bits[ARM::ProcA5] || Bits[ARM::ProcA8]) && // Where this matters
(Options.UnsafeFPMath || isTargetDarwin()))
(Options.UnsafeFPMath || isTargetDarwin() ||
DM == DenormalMode::getPreserveSign()))
HasNEONForFP = true;

if (isRWPI())
Expand Down
8 changes: 7 additions & 1 deletion llvm/lib/Target/ARM/ARMSubtarget.h
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Expand Up @@ -186,6 +186,12 @@ class ARMSubtarget : public ARMGenSubtargetInfo {
/// IsLittle - The target is Little Endian
bool IsLittle;

/// DM - Denormal mode
/// NEON and VFP RunFast mode are not IEEE 754 compliant,
/// use this field to determine whether to generate NEON/VFP
/// instructions in related function.
DenormalMode DM;

/// TargetTriple - What processor and OS we're targeting.
Triple TargetTriple;

Expand All @@ -206,7 +212,7 @@ class ARMSubtarget : public ARMGenSubtargetInfo {
///
ARMSubtarget(const Triple &TT, const std::string &CPU, const std::string &FS,
const ARMBaseTargetMachine &TM, bool IsLittle,
bool MinSize = false);
bool MinSize = false, DenormalMode DM = DenormalMode::getIEEE());

/// getMaxInlineSizeThreshold - Returns the maximum memset / memcpy size
/// that still makes it profitable to inline the call.
Expand Down
6 changes: 5 additions & 1 deletion llvm/lib/Target/ARM/ARMTargetMachine.cpp
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Expand Up @@ -229,14 +229,18 @@ ARMBaseTargetMachine::getSubtargetImpl(const Function &F) const {
if (F.hasMinSize())
Key += "+minsize";

DenormalMode DM = F.getDenormalModeRaw();
if (DM != DenormalMode::getIEEE())
Key += "denormal-fp-math=" + DM.str();

auto &I = SubtargetMap[Key];
if (!I) {
// This needs to be done before we create a new subtarget since any
// creation will depend on the TM and the code generation flags on the
// function that reside in TargetOptions.
resetTargetOptions(F);
I = std::make_unique<ARMSubtarget>(TargetTriple, CPU, FS, *this, isLittle,
F.hasMinSize());
F.hasMinSize(), DM);

if (!I->isThumb() && !I->hasARMOps())
F.getContext().emitError("Function '" + F.getName() + "' uses ARM "
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/ARM/fadds.ll
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Expand Up @@ -7,7 +7,7 @@
; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 %s -o - \
; RUN: | FileCheck %s -check-prefix=CORTEXA8

; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 --enable-unsafe-fp-math %s -o - \
; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 --denormal-fp-math=preserve-sign %s -o - \
; RUN: | FileCheck %s -check-prefix=CORTEXA8U

; RUN: llc -mtriple=arm-darwin -mcpu=cortex-a8 %s -o - \
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/ARM/fmuls.ll
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Expand Up @@ -7,7 +7,7 @@
; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 %s -o - \
; RUN: | FileCheck %s -check-prefix=CORTEXA8

; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 --enable-unsafe-fp-math %s -o - \
; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 --denormal-fp-math=preserve-sign %s -o - \
; RUN: | FileCheck %s -check-prefix=CORTEXA8U

; RUN: llc -mtriple=arm-darwin -mcpu=cortex-a8 %s -o - \
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/ARM/fp_convert.ll
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Expand Up @@ -7,7 +7,7 @@
; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 %s -o - \
; RUN: | FileCheck %s -check-prefix=VFP2

; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 --enable-unsafe-fp-math %s -o - \
; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 --denormal-fp-math=preserve-sign %s -o - \
; RUN: | FileCheck %s -check-prefix=NEON

; RUN: llc -mtriple=arm-darwin -mcpu=cortex-a8 %s -o - \
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/ARM/fsubs.ll
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Expand Up @@ -4,7 +4,7 @@
; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 %s -o - \
; RUN: | FileCheck %s -check-prefix=NFP1

; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 --enable-unsafe-fp-math %s -o - \
; RUN: llc -mtriple=arm-eabi -mcpu=cortex-a8 --denormal-fp-math=preserve-sign %s -o - \
; RUN: | FileCheck %s -check-prefix=NFP1U

; RUN: llc -mtriple=arm-darwin -mcpu=cortex-a8 %s -o - \
Expand Down
10 changes: 5 additions & 5 deletions llvm/test/CodeGen/ARM/neon-spfp.ll
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Expand Up @@ -4,11 +4,11 @@
; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a15 | FileCheck %s -check-prefix=CHECK-LINUXA15
; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=swift | FileCheck %s -check-prefix=CHECK-LINUXSWIFT

; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a5 --enable-unsafe-fp-math | FileCheck %s -check-prefix=CHECK-UNSAFEA5
; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a8 --enable-unsafe-fp-math | FileCheck %s -check-prefix=CHECK-UNSAFEA8
; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a9 --enable-unsafe-fp-math | FileCheck %s -check-prefix=CHECK-UNSAFEA9
; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a15 --enable-unsafe-fp-math | FileCheck %s -check-prefix=CHECK-UNSAFEA15
; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=swift --enable-unsafe-fp-math | FileCheck %s -check-prefix=CHECK-UNSAFESWIFT
; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a5 --denormal-fp-math=preserve-sign | FileCheck %s -check-prefix=CHECK-UNSAFEA5
; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a8 --denormal-fp-math=preserve-sign | FileCheck %s -check-prefix=CHECK-UNSAFEA8
; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a9 --denormal-fp-math=preserve-sign | FileCheck %s -check-prefix=CHECK-UNSAFEA9
; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=cortex-a15 --denormal-fp-math=preserve-sign| FileCheck %s -check-prefix=CHECK-UNSAFEA15
; RUN: llc < %s -mtriple armv7a-none-linux-gnueabihf -mcpu=swift --denormal-fp-math=preserve-sign | FileCheck %s -check-prefix=CHECK-UNSAFESWIFT

; RUN: llc < %s -mtriple armv7a-none-darwin -mcpu=cortex-a5 | FileCheck %s -check-prefix=CHECK-DARWINA5
; RUN: llc < %s -mtriple armv7a-none-darwin -mcpu=cortex-a8 | FileCheck %s -check-prefix=CHECK-DARWINA8
Expand Down