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Merged
merged 3 commits into from
Sep 25, 2025
Merged

[X86] masked_store_trunc.ll - add missing prefixes #160685

merged 3 commits into from
Sep 25, 2025

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RKSimon
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@RKSimon RKSimon commented Sep 25, 2025

Since #159321 we now get actual warnings when we're missing coverage

@RKSimon
[X86] masked_store_trunc.ll - add missing prefixes
b5d6fdf 
Since llvm#159321 we now get actual warnings when we're missing coverage
@RKSimon RKSimon enabled auto-merge (squash) September 25, 2025 11:07
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llvmbot commented Sep 25, 2025

@llvm/pr-subscribers-backend-x86

Author: Simon Pilgrim (RKSimon)

Changes

Since #159321 we now get actual warnings when we're missing coverage

Patch is 55.79 KiB, truncated to 20.00 KiB below, full version: https://github.com/llvm/llvm-project/pull/160685.diff

1 Files Affected:

  • (modified) llvm/test/CodeGen/X86/masked_store_trunc.ll (+1139-64)
diff --git a/llvm/test/CodeGen/X86/masked_store_trunc.ll b/llvm/test/CodeGen/X86/masked_store_trunc.ll
index 2f0d419132492..ecf4fbb603a8f 100644
--- a/llvm/test/CodeGen/X86/masked_store_trunc.ll
+++ b/llvm/test/CodeGen/X86/masked_store_trunc.ll
@@ -1,11 +1,11 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse2    | FileCheck %s --check-prefix=SSE2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse4.2  | FileCheck %s --check-prefix=SSE4
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse2    | FileCheck %s --check-prefixes=SSE2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=sse4.2  | FileCheck %s --check-prefixes=SSE4
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx     | FileCheck %s --check-prefixes=AVX,AVX1
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx2    | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f | FileCheck %s --check-prefix=AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512vl | FileCheck %s --check-prefix=AVX512VL
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512bw | FileCheck %s --check-prefix=AVX512BW
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512f | FileCheck %s --check-prefixes=AVX512,AVX512F
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512vl | FileCheck %s --check-prefixes=AVX512VL,AVX512FVL
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512bw | FileCheck %s --check-prefixes=AVX512,AVX512BW
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512vl,avx512bw | FileCheck %s --check-prefixes=AVX512VL,AVX512BWVL
 
 define void @truncstore_v8i64_v8i32(<8 x i64> %x, ptr %p, <8 x i32> %mask) {
@@ -178,13 +178,13 @@ define void @truncstore_v8i64_v8i32(<8 x i64> %x, ptr %p, <8 x i32> %mask) {
 ; AVX2-NEXT:    vzeroupper
 ; AVX2-NEXT:    retq
 ;
-; AVX512F-LABEL: truncstore_v8i64_v8i32:
-; AVX512F:       # %bb.0:
-; AVX512F-NEXT:    # kill: def $ymm1 killed $ymm1 def $zmm1
-; AVX512F-NEXT:    vptestmd %zmm1, %zmm1, %k1
-; AVX512F-NEXT:    vpmovqd %zmm0, (%rdi) {%k1}
-; AVX512F-NEXT:    vzeroupper
-; AVX512F-NEXT:    retq
+; AVX512-LABEL: truncstore_v8i64_v8i32:
+; AVX512:       # %bb.0:
+; AVX512-NEXT:    # kill: def $ymm1 killed $ymm1 def $zmm1
+; AVX512-NEXT:    vptestmd %zmm1, %zmm1, %k1
+; AVX512-NEXT:    vpmovqd %zmm0, (%rdi) {%k1}
+; AVX512-NEXT:    vzeroupper
+; AVX512-NEXT:    retq
 ;
 ; AVX512VL-LABEL: truncstore_v8i64_v8i32:
 ; AVX512VL:       # %bb.0:
@@ -192,14 +192,6 @@ define void @truncstore_v8i64_v8i32(<8 x i64> %x, ptr %p, <8 x i32> %mask) {
 ; AVX512VL-NEXT:    vpmovqd %zmm0, (%rdi) {%k1}
 ; AVX512VL-NEXT:    vzeroupper
 ; AVX512VL-NEXT:    retq
-;
-; AVX512BW-LABEL: truncstore_v8i64_v8i32:
-; AVX512BW:       # %bb.0:
-; AVX512BW-NEXT:    # kill: def $ymm1 killed $ymm1 def $zmm1
-; AVX512BW-NEXT:    vptestmd %zmm1, %zmm1, %k1
-; AVX512BW-NEXT:    vpmovqd %zmm0, (%rdi) {%k1}
-; AVX512BW-NEXT:    vzeroupper
-; AVX512BW-NEXT:    retq
   %a = icmp ne <8 x i32> %mask, zeroinitializer
   %b = trunc <8 x i64> %x to <8 x i32>
   call void @llvm.masked.store.v8i32.p0(<8 x i32> %b, ptr %p, i32 1, <8 x i1> %a)
@@ -573,6 +565,70 @@ define void @truncstore_v8i64_v8i16(<8 x i64> %x, ptr %p, <8 x i32> %mask) {
 ; AVX512F-NEXT:    vzeroupper
 ; AVX512F-NEXT:    retq
 ;
+; AVX512FVL-LABEL: truncstore_v8i64_v8i16:
+; AVX512FVL:       # %bb.0:
+; AVX512FVL-NEXT:    vptestmd %ymm1, %ymm1, %k0
+; AVX512FVL-NEXT:    vpmovqw %zmm0, %xmm0
+; AVX512FVL-NEXT:    kmovw %k0, %eax
+; AVX512FVL-NEXT:    testb $1, %al
+; AVX512FVL-NEXT:    jne .LBB1_1
+; AVX512FVL-NEXT:  # %bb.2: # %else
+; AVX512FVL-NEXT:    testb $2, %al
+; AVX512FVL-NEXT:    jne .LBB1_3
+; AVX512FVL-NEXT:  .LBB1_4: # %else2
+; AVX512FVL-NEXT:    testb $4, %al
+; AVX512FVL-NEXT:    jne .LBB1_5
+; AVX512FVL-NEXT:  .LBB1_6: # %else4
+; AVX512FVL-NEXT:    testb $8, %al
+; AVX512FVL-NEXT:    jne .LBB1_7
+; AVX512FVL-NEXT:  .LBB1_8: # %else6
+; AVX512FVL-NEXT:    testb $16, %al
+; AVX512FVL-NEXT:    jne .LBB1_9
+; AVX512FVL-NEXT:  .LBB1_10: # %else8
+; AVX512FVL-NEXT:    testb $32, %al
+; AVX512FVL-NEXT:    jne .LBB1_11
+; AVX512FVL-NEXT:  .LBB1_12: # %else10
+; AVX512FVL-NEXT:    testb $64, %al
+; AVX512FVL-NEXT:    jne .LBB1_13
+; AVX512FVL-NEXT:  .LBB1_14: # %else12
+; AVX512FVL-NEXT:    testb $-128, %al
+; AVX512FVL-NEXT:    jne .LBB1_15
+; AVX512FVL-NEXT:  .LBB1_16: # %else14
+; AVX512FVL-NEXT:    vzeroupper
+; AVX512FVL-NEXT:    retq
+; AVX512FVL-NEXT:  .LBB1_1: # %cond.store
+; AVX512FVL-NEXT:    vpextrw $0, %xmm0, (%rdi)
+; AVX512FVL-NEXT:    testb $2, %al
+; AVX512FVL-NEXT:    je .LBB1_4
+; AVX512FVL-NEXT:  .LBB1_3: # %cond.store1
+; AVX512FVL-NEXT:    vpextrw $1, %xmm0, 2(%rdi)
+; AVX512FVL-NEXT:    testb $4, %al
+; AVX512FVL-NEXT:    je .LBB1_6
+; AVX512FVL-NEXT:  .LBB1_5: # %cond.store3
+; AVX512FVL-NEXT:    vpextrw $2, %xmm0, 4(%rdi)
+; AVX512FVL-NEXT:    testb $8, %al
+; AVX512FVL-NEXT:    je .LBB1_8
+; AVX512FVL-NEXT:  .LBB1_7: # %cond.store5
+; AVX512FVL-NEXT:    vpextrw $3, %xmm0, 6(%rdi)
+; AVX512FVL-NEXT:    testb $16, %al
+; AVX512FVL-NEXT:    je .LBB1_10
+; AVX512FVL-NEXT:  .LBB1_9: # %cond.store7
+; AVX512FVL-NEXT:    vpextrw $4, %xmm0, 8(%rdi)
+; AVX512FVL-NEXT:    testb $32, %al
+; AVX512FVL-NEXT:    je .LBB1_12
+; AVX512FVL-NEXT:  .LBB1_11: # %cond.store9
+; AVX512FVL-NEXT:    vpextrw $5, %xmm0, 10(%rdi)
+; AVX512FVL-NEXT:    testb $64, %al
+; AVX512FVL-NEXT:    je .LBB1_14
+; AVX512FVL-NEXT:  .LBB1_13: # %cond.store11
+; AVX512FVL-NEXT:    vpextrw $6, %xmm0, 12(%rdi)
+; AVX512FVL-NEXT:    testb $-128, %al
+; AVX512FVL-NEXT:    je .LBB1_16
+; AVX512FVL-NEXT:  .LBB1_15: # %cond.store13
+; AVX512FVL-NEXT:    vpextrw $7, %xmm0, 14(%rdi)
+; AVX512FVL-NEXT:    vzeroupper
+; AVX512FVL-NEXT:    retq
+;
 ; AVX512BW-LABEL: truncstore_v8i64_v8i16:
 ; AVX512BW:       # %bb.0:
 ; AVX512BW-NEXT:    # kill: def $ymm1 killed $ymm1 def $zmm1
@@ -960,6 +1016,70 @@ define void @truncstore_v8i64_v8i8(<8 x i64> %x, ptr %p, <8 x i32> %mask) {
 ; AVX512F-NEXT:    vzeroupper
 ; AVX512F-NEXT:    retq
 ;
+; AVX512FVL-LABEL: truncstore_v8i64_v8i8:
+; AVX512FVL:       # %bb.0:
+; AVX512FVL-NEXT:    vptestmd %ymm1, %ymm1, %k0
+; AVX512FVL-NEXT:    vpmovqb %zmm0, %xmm0
+; AVX512FVL-NEXT:    kmovw %k0, %eax
+; AVX512FVL-NEXT:    testb $1, %al
+; AVX512FVL-NEXT:    jne .LBB2_1
+; AVX512FVL-NEXT:  # %bb.2: # %else
+; AVX512FVL-NEXT:    testb $2, %al
+; AVX512FVL-NEXT:    jne .LBB2_3
+; AVX512FVL-NEXT:  .LBB2_4: # %else2
+; AVX512FVL-NEXT:    testb $4, %al
+; AVX512FVL-NEXT:    jne .LBB2_5
+; AVX512FVL-NEXT:  .LBB2_6: # %else4
+; AVX512FVL-NEXT:    testb $8, %al
+; AVX512FVL-NEXT:    jne .LBB2_7
+; AVX512FVL-NEXT:  .LBB2_8: # %else6
+; AVX512FVL-NEXT:    testb $16, %al
+; AVX512FVL-NEXT:    jne .LBB2_9
+; AVX512FVL-NEXT:  .LBB2_10: # %else8
+; AVX512FVL-NEXT:    testb $32, %al
+; AVX512FVL-NEXT:    jne .LBB2_11
+; AVX512FVL-NEXT:  .LBB2_12: # %else10
+; AVX512FVL-NEXT:    testb $64, %al
+; AVX512FVL-NEXT:    jne .LBB2_13
+; AVX512FVL-NEXT:  .LBB2_14: # %else12
+; AVX512FVL-NEXT:    testb $-128, %al
+; AVX512FVL-NEXT:    jne .LBB2_15
+; AVX512FVL-NEXT:  .LBB2_16: # %else14
+; AVX512FVL-NEXT:    vzeroupper
+; AVX512FVL-NEXT:    retq
+; AVX512FVL-NEXT:  .LBB2_1: # %cond.store
+; AVX512FVL-NEXT:    vpextrb $0, %xmm0, (%rdi)
+; AVX512FVL-NEXT:    testb $2, %al
+; AVX512FVL-NEXT:    je .LBB2_4
+; AVX512FVL-NEXT:  .LBB2_3: # %cond.store1
+; AVX512FVL-NEXT:    vpextrb $1, %xmm0, 1(%rdi)
+; AVX512FVL-NEXT:    testb $4, %al
+; AVX512FVL-NEXT:    je .LBB2_6
+; AVX512FVL-NEXT:  .LBB2_5: # %cond.store3
+; AVX512FVL-NEXT:    vpextrb $2, %xmm0, 2(%rdi)
+; AVX512FVL-NEXT:    testb $8, %al
+; AVX512FVL-NEXT:    je .LBB2_8
+; AVX512FVL-NEXT:  .LBB2_7: # %cond.store5
+; AVX512FVL-NEXT:    vpextrb $3, %xmm0, 3(%rdi)
+; AVX512FVL-NEXT:    testb $16, %al
+; AVX512FVL-NEXT:    je .LBB2_10
+; AVX512FVL-NEXT:  .LBB2_9: # %cond.store7
+; AVX512FVL-NEXT:    vpextrb $4, %xmm0, 4(%rdi)
+; AVX512FVL-NEXT:    testb $32, %al
+; AVX512FVL-NEXT:    je .LBB2_12
+; AVX512FVL-NEXT:  .LBB2_11: # %cond.store9
+; AVX512FVL-NEXT:    vpextrb $5, %xmm0, 5(%rdi)
+; AVX512FVL-NEXT:    testb $64, %al
+; AVX512FVL-NEXT:    je .LBB2_14
+; AVX512FVL-NEXT:  .LBB2_13: # %cond.store11
+; AVX512FVL-NEXT:    vpextrb $6, %xmm0, 6(%rdi)
+; AVX512FVL-NEXT:    testb $-128, %al
+; AVX512FVL-NEXT:    je .LBB2_16
+; AVX512FVL-NEXT:  .LBB2_15: # %cond.store13
+; AVX512FVL-NEXT:    vpextrb $7, %xmm0, 7(%rdi)
+; AVX512FVL-NEXT:    vzeroupper
+; AVX512FVL-NEXT:    retq
+;
 ; AVX512BW-LABEL: truncstore_v8i64_v8i8:
 ; AVX512BW:       # %bb.0:
 ; AVX512BW-NEXT:    # kill: def $ymm1 killed $ymm1 def $zmm1
@@ -1080,17 +1200,17 @@ define void @truncstore_v4i64_v4i32(<4 x i64> %x, ptr %p, <4 x i32> %mask) {
 ; AVX2-NEXT:    vzeroupper
 ; AVX2-NEXT:    retq
 ;
-; AVX512F-LABEL: truncstore_v4i64_v4i32:
-; AVX512F:       # %bb.0:
-; AVX512F-NEXT:    # kill: def $xmm1 killed $xmm1 def $zmm1
-; AVX512F-NEXT:    # kill: def $ymm0 killed $ymm0 def $zmm0
-; AVX512F-NEXT:    vptestmd %zmm1, %zmm1, %k0
-; AVX512F-NEXT:    kshiftlw $12, %k0, %k0
-; AVX512F-NEXT:    kshiftrw $12, %k0, %k1
-; AVX512F-NEXT:    vpmovqd %zmm0, %ymm0
-; AVX512F-NEXT:    vmovdqu32 %zmm0, (%rdi) {%k1}
-; AVX512F-NEXT:    vzeroupper
-; AVX512F-NEXT:    retq
+; AVX512-LABEL: truncstore_v4i64_v4i32:
+; AVX512:       # %bb.0:
+; AVX512-NEXT:    # kill: def $xmm1 killed $xmm1 def $zmm1
+; AVX512-NEXT:    # kill: def $ymm0 killed $ymm0 def $zmm0
+; AVX512-NEXT:    vptestmd %zmm1, %zmm1, %k0
+; AVX512-NEXT:    kshiftlw $12, %k0, %k0
+; AVX512-NEXT:    kshiftrw $12, %k0, %k1
+; AVX512-NEXT:    vpmovqd %zmm0, %ymm0
+; AVX512-NEXT:    vmovdqu32 %zmm0, (%rdi) {%k1}
+; AVX512-NEXT:    vzeroupper
+; AVX512-NEXT:    retq
 ;
 ; AVX512VL-LABEL: truncstore_v4i64_v4i32:
 ; AVX512VL:       # %bb.0:
@@ -1098,18 +1218,6 @@ define void @truncstore_v4i64_v4i32(<4 x i64> %x, ptr %p, <4 x i32> %mask) {
 ; AVX512VL-NEXT:    vpmovqd %ymm0, (%rdi) {%k1}
 ; AVX512VL-NEXT:    vzeroupper
 ; AVX512VL-NEXT:    retq
-;
-; AVX512BW-LABEL: truncstore_v4i64_v4i32:
-; AVX512BW:       # %bb.0:
-; AVX512BW-NEXT:    # kill: def $xmm1 killed $xmm1 def $zmm1
-; AVX512BW-NEXT:    # kill: def $ymm0 killed $ymm0 def $zmm0
-; AVX512BW-NEXT:    vptestmd %zmm1, %zmm1, %k0
-; AVX512BW-NEXT:    kshiftlw $12, %k0, %k0
-; AVX512BW-NEXT:    kshiftrw $12, %k0, %k1
-; AVX512BW-NEXT:    vpmovqd %zmm0, %ymm0
-; AVX512BW-NEXT:    vmovdqu32 %zmm0, (%rdi) {%k1}
-; AVX512BW-NEXT:    vzeroupper
-; AVX512BW-NEXT:    retq
   %a = icmp ne <4 x i32> %mask, zeroinitializer
   %b = trunc <4 x i64> %x to <4 x i32>
   call void @llvm.masked.store.v4i32.p0(<4 x i32> %b, ptr %p, i32 1, <4 x i1> %a)
@@ -1321,6 +1429,42 @@ define void @truncstore_v4i64_v4i16(<4 x i64> %x, ptr %p, <4 x i32> %mask) {
 ; AVX512F-NEXT:    vzeroupper
 ; AVX512F-NEXT:    retq
 ;
+; AVX512FVL-LABEL: truncstore_v4i64_v4i16:
+; AVX512FVL:       # %bb.0:
+; AVX512FVL-NEXT:    vptestmd %xmm1, %xmm1, %k0
+; AVX512FVL-NEXT:    vpmovqw %ymm0, %xmm0
+; AVX512FVL-NEXT:    kmovw %k0, %eax
+; AVX512FVL-NEXT:    testb $1, %al
+; AVX512FVL-NEXT:    jne .LBB4_1
+; AVX512FVL-NEXT:  # %bb.2: # %else
+; AVX512FVL-NEXT:    testb $2, %al
+; AVX512FVL-NEXT:    jne .LBB4_3
+; AVX512FVL-NEXT:  .LBB4_4: # %else2
+; AVX512FVL-NEXT:    testb $4, %al
+; AVX512FVL-NEXT:    jne .LBB4_5
+; AVX512FVL-NEXT:  .LBB4_6: # %else4
+; AVX512FVL-NEXT:    testb $8, %al
+; AVX512FVL-NEXT:    jne .LBB4_7
+; AVX512FVL-NEXT:  .LBB4_8: # %else6
+; AVX512FVL-NEXT:    vzeroupper
+; AVX512FVL-NEXT:    retq
+; AVX512FVL-NEXT:  .LBB4_1: # %cond.store
+; AVX512FVL-NEXT:    vpextrw $0, %xmm0, (%rdi)
+; AVX512FVL-NEXT:    testb $2, %al
+; AVX512FVL-NEXT:    je .LBB4_4
+; AVX512FVL-NEXT:  .LBB4_3: # %cond.store1
+; AVX512FVL-NEXT:    vpextrw $1, %xmm0, 2(%rdi)
+; AVX512FVL-NEXT:    testb $4, %al
+; AVX512FVL-NEXT:    je .LBB4_6
+; AVX512FVL-NEXT:  .LBB4_5: # %cond.store3
+; AVX512FVL-NEXT:    vpextrw $2, %xmm0, 4(%rdi)
+; AVX512FVL-NEXT:    testb $8, %al
+; AVX512FVL-NEXT:    je .LBB4_8
+; AVX512FVL-NEXT:  .LBB4_7: # %cond.store5
+; AVX512FVL-NEXT:    vpextrw $3, %xmm0, 6(%rdi)
+; AVX512FVL-NEXT:    vzeroupper
+; AVX512FVL-NEXT:    retq
+;
 ; AVX512BW-LABEL: truncstore_v4i64_v4i16:
 ; AVX512BW:       # %bb.0:
 ; AVX512BW-NEXT:    # kill: def $xmm1 killed $xmm1 def $zmm1
@@ -1552,6 +1696,42 @@ define void @truncstore_v4i64_v4i8(<4 x i64> %x, ptr %p, <4 x i32> %mask) {
 ; AVX512F-NEXT:    vzeroupper
 ; AVX512F-NEXT:    retq
 ;
+; AVX512FVL-LABEL: truncstore_v4i64_v4i8:
+; AVX512FVL:       # %bb.0:
+; AVX512FVL-NEXT:    vptestmd %xmm1, %xmm1, %k0
+; AVX512FVL-NEXT:    vpmovqb %ymm0, %xmm0
+; AVX512FVL-NEXT:    kmovw %k0, %eax
+; AVX512FVL-NEXT:    testb $1, %al
+; AVX512FVL-NEXT:    jne .LBB5_1
+; AVX512FVL-NEXT:  # %bb.2: # %else
+; AVX512FVL-NEXT:    testb $2, %al
+; AVX512FVL-NEXT:    jne .LBB5_3
+; AVX512FVL-NEXT:  .LBB5_4: # %else2
+; AVX512FVL-NEXT:    testb $4, %al
+; AVX512FVL-NEXT:    jne .LBB5_5
+; AVX512FVL-NEXT:  .LBB5_6: # %else4
+; AVX512FVL-NEXT:    testb $8, %al
+; AVX512FVL-NEXT:    jne .LBB5_7
+; AVX512FVL-NEXT:  .LBB5_8: # %else6
+; AVX512FVL-NEXT:    vzeroupper
+; AVX512FVL-NEXT:    retq
+; AVX512FVL-NEXT:  .LBB5_1: # %cond.store
+; AVX512FVL-NEXT:    vpextrb $0, %xmm0, (%rdi)
+; AVX512FVL-NEXT:    testb $2, %al
+; AVX512FVL-NEXT:    je .LBB5_4
+; AVX512FVL-NEXT:  .LBB5_3: # %cond.store1
+; AVX512FVL-NEXT:    vpextrb $1, %xmm0, 1(%rdi)
+; AVX512FVL-NEXT:    testb $4, %al
+; AVX512FVL-NEXT:    je .LBB5_6
+; AVX512FVL-NEXT:  .LBB5_5: # %cond.store3
+; AVX512FVL-NEXT:    vpextrb $2, %xmm0, 2(%rdi)
+; AVX512FVL-NEXT:    testb $8, %al
+; AVX512FVL-NEXT:    je .LBB5_8
+; AVX512FVL-NEXT:  .LBB5_7: # %cond.store5
+; AVX512FVL-NEXT:    vpextrb $3, %xmm0, 3(%rdi)
+; AVX512FVL-NEXT:    vzeroupper
+; AVX512FVL-NEXT:    retq
+;
 ; AVX512BW-LABEL: truncstore_v4i64_v4i8:
 ; AVX512BW:       # %bb.0:
 ; AVX512BW-NEXT:    # kill: def $xmm1 killed $xmm1 def $zmm1
@@ -1646,33 +1826,22 @@ define void @truncstore_v2i64_v2i32(<2 x i64> %x, ptr %p, <2 x i64> %mask) {
 ; AVX2-NEXT:    vpmaskmovd %xmm0, %xmm1, (%rdi)
 ; AVX2-NEXT:    retq
 ;
-; AVX512F-LABEL: truncstore_v2i64_v2i32:
-; AVX512F:       # %bb.0:
-; AVX512F-NEXT:    # kill: def $xmm1 killed $xmm1 def $zmm1
-; AVX512F-NEXT:    vptestmq %zmm1, %zmm1, %k0
-; AVX512F-NEXT:    kshiftlw $14, %k0, %k0
-; AVX512F-NEXT:    kshiftrw $14, %k0, %k1
-; AVX512F-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
-; AVX512F-NEXT:    vmovdqu32 %zmm0, (%rdi) {%k1}
-; AVX512F-NEXT:    vzeroupper
-; AVX512F-NEXT:    retq
+; AVX512-LABEL: truncstore_v2i64_v2i32:
+; AVX512:       # %bb.0:
+; AVX512-NEXT:    # kill: def $xmm1 killed $xmm1 def $zmm1
+; AVX512-NEXT:    vptestmq %zmm1, %zmm1, %k0
+; AVX512-NEXT:    kshiftlw $14, %k0, %k0
+; AVX512-NEXT:    kshiftrw $14, %k0, %k1
+; AVX512-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
+; AVX512-NEXT:    vmovdqu32 %zmm0, (%rdi) {%k1}
+; AVX512-NEXT:    vzeroupper
+; AVX512-NEXT:    retq
 ;
 ; AVX512VL-LABEL: truncstore_v2i64_v2i32:
 ; AVX512VL:       # %bb.0:
 ; AVX512VL-NEXT:    vptestmq %xmm1, %xmm1, %k1
 ; AVX512VL-NEXT:    vpmovqd %xmm0, (%rdi) {%k1}
 ; AVX512VL-NEXT:    retq
-;
-; AVX512BW-LABEL: truncstore_v2i64_v2i32:
-; AVX512BW:       # %bb.0:
-; AVX512BW-NEXT:    # kill: def $xmm1 killed $xmm1 def $zmm1
-; AVX512BW-NEXT:    vptestmq %zmm1, %zmm1, %k0
-; AVX512BW-NEXT:    kshiftlw $14, %k0, %k0
-; AVX512BW-NEXT:    kshiftrw $14, %k0, %k1
-; AVX512BW-NEXT:    vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
-; AVX512BW-NEXT:    vmovdqu32 %zmm0, (%rdi) {%k1}
-; AVX512BW-NEXT:    vzeroupper
-; AVX512BW-NEXT:    retq
   %a = icmp ne <2 x i64> %mask, zeroinitializer
   %b = trunc <2 x i64> %x to <2 x i32>
   call void @llvm.masked.store.v2i32.p0(<2 x i32> %b, ptr %p, i32 1, <2 x i1> %a)
@@ -1777,6 +1946,26 @@ define void @truncstore_v2i64_v2i16(<2 x i64> %x, ptr %p, <2 x i64> %mask) {
 ; AVX512F-NEXT:    vzeroupper
 ; AVX512F-NEXT:    retq
 ;
+; AVX512FVL-LABEL: truncstore_v2i64_v2i16:
+; AVX512FVL:       # %bb.0:
+; AVX512FVL-NEXT:    vptestmq %xmm1, %xmm1, %k0
+; AVX512FVL-NEXT:    vpmovqw %xmm0, %xmm0
+; AVX512FVL-NEXT:    kmovw %k0, %eax
+; AVX512FVL-NEXT:    testb $1, %al
+; AVX512FVL-NEXT:    jne .LBB7_1
+; AVX512FVL-NEXT:  # %bb.2: # %else
+; AVX512FVL-NEXT:    testb $2, %al
+; AVX512FVL-NEXT:    jne .LBB7_3
+; AVX512FVL-NEXT:  .LBB7_4: # %else2
+; AVX512FVL-NEXT:    retq
+; AVX512FVL-NEXT:  .LBB7_1: # %cond.store
+; AVX512FVL-NEXT:    vpextrw $0, %xmm0, (%rdi)
+; AVX512FVL-NEXT:    testb $2, %al
+; AVX512FVL-NEXT:    je .LBB7_4
+; AVX512FVL-NEXT:  .LBB7_3: # %cond.store1
+; AVX512FVL-NEXT:    vpextrw $1, %xmm0, 2(%rdi)
+; AVX512FVL-NEXT:    retq
+;
 ; AVX512BW-LABEL: truncstore_v2i64_v2i16:
 ; AVX512BW:       # %bb.0:
 ; AVX512BW-NEXT:    # kill: def $xmm1 killed $xmm1 def $zmm1
@@ -1896,6 +2085,26 @@ define void @truncstore_v2i64_v2i8(<2 x i64> %x, ptr %p, <2 x i64> %mask) {
 ; AVX512F-NEXT:    vzeroupper
 ; AVX512F-NEXT:    retq
 ;
+; AVX512FVL-LABEL: truncstore_v2i64_v2i8:
+; AVX512FVL:       # %bb.0:
+; AVX512FVL-NEXT:    vptestmq %xmm1, %xmm1, %k0
+; AVX512FVL-NEXT:    vpmovqb %xmm0, %xmm0
+; AVX512FVL-NEXT:    kmovw %k0, %eax
+; AVX512FVL-NEXT:    testb $1, %al
+; AVX512FVL-NEXT:    jne .LBB8_1
+; AVX512FVL-NEXT:  # %bb.2: # %else
+; AVX512FVL-NEXT:    testb $2, %al
+; AVX512FVL-NEXT:    jne .LBB8_3
+; AVX512FVL-NEXT:  .LBB8_4: # %else2
+; AVX512FVL-NEXT:    retq
+; AVX512FVL-NEXT:  .LBB8_1: # %cond.store
+; AVX512FVL-NEXT:    vpextrb $0, %xmm0, (%rdi)
+; AVX512FVL-NEXT:    testb $2, %al
+; AVX512FVL-NEXT:    je .LBB8_4
+; AVX512FVL-NEXT:  .LBB8_3: # %cond.store1
+; AVX512FVL-NEXT:    vpextrb $1, %xmm0, 1(%rdi)
+; AVX512FVL-NEXT:    retq
+;
 ; AVX512BW-LABEL: truncstore_v2i64_v2i8:
 ; AVX512BW:       # %bb.0:
 ; AVX512BW-NEXT:    # kill: def $xmm1 killed $xmm1 def $zmm1
@@ -2581,6 +2790,126 @@ define void @truncstore_v16i32_v16i16(<16 x i32> %x, ptr %p, <16 x i32> %mask) {
 ; AVX512F-NEXT:    vzeroupper
 ; AVX512F-NEXT:    retq
 ;
+; AVX512FVL-LABEL: truncstore_v16i32_v16i16:
+; AVX512FVL:       # %bb.0:
+; AVX512FVL-NEXT:    vptestmd %zmm1, %zmm1, %k0
+; AVX512FVL-NEXT:    vpmovdw %zmm0, %ymm0
+; AVX512FVL-NEXT:    kmovw %k0, %eax
+; AVX512FVL-NEXT:    testb $1, %al
+; AVX512FVL-NEXT:    jne .LBB9_1
+; AVX512FVL-NEXT:  # %bb.2: # %else
+; AVX512FVL-NEXT:    testb $2, %al
+; AVX512FVL-NEXT:    jne .LBB9_3
+; AVX512FVL-NEXT:  .LBB9_4: # %else2
+; AVX512FVL-NEXT:    testb $4, %al
+; AVX512FVL-NEXT:    jne .LBB9_5
+; AVX512FVL-NEXT:  .LBB9_6: # %else4
+; AVX512FVL-NEXT:    testb $8, %al
+; AVX512FVL-NEXT:    jne .LBB9_7
+; AVX512FVL-NEXT:  .LBB9_8: # %else6
+; AVX512FVL-NEXT:    testb $16, %al
+; AVX512FVL-NEXT:    jne .LBB9_9
+; AVX512FVL-NEXT:  .LBB9_10: # %else8
+; AVX512FVL-NEXT:    testb $32, %al
+; AVX512FVL-NEXT:    jne .LBB9_11
+; AVX512FVL-NEXT:  .LBB9_12: # %else10
+; AVX512FVL-NEXT:    testb $64, %al
+; AVX512FVL-NEXT:    jne .LBB9_13
+; AVX512FVL-NEXT:  .LBB9_14: # %else12
+; AVX512FVL-NEXT:    testb %al, %al
+; AVX512FVL-NEXT:    jns .LBB9_16
+; AVX512FVL-NEXT:  .LBB9_15: # %cond.store13
+; AVX512FVL-NEXT:    vpextrw $7, %xmm0, 14(%rdi)
+; AVX512FVL-NEXT:  .LBB9_16: # %else14
+; AVX512FVL-NEXT:    testl $256, %eax # imm = 0x100
+; AVX512FVL-NEXT:    vextracti128 $1, %ymm0, %xmm0
+; AVX512FVL-NEXT:    jne .LBB9_17
+; AVX512FVL-NEXT:  # %bb.18: # %else16
+; AVX512FVL-NEXT:    testl $512, %eax # imm = 0x200
+; AVX512FVL-NEXT:    jne .LBB9_19
+; AVX512FVL-NEXT:  .LBB9_20: # %else18
+; AVX512FVL-NEXT:    testl $1024, %eax # imm = 0x400
+; AVX512FVL-NEXT:    jne .LBB9_21
+; AVX512FVL-NEXT:  .LBB9_22: # %else20
+; AVX512FVL-NEXT:    testl $2048, %eax # imm = 0x800
+; AVX512FVL-NEXT:    jne .LBB9_23
+; AVX512FVL-NEXT:  .LBB9_24: # %else22
+; AVX512FVL-NEXT:    testl $4096, %eax # imm = 0x1000
+; AVX512FVL-NEXT:    jne .LBB9_25
+; AVX512FVL-NEXT:  .LBB9_26: # %else24
+; AVX512FVL-NEXT:    testl $8192, %eax # imm = 0x2000
+; AVX512FVL-NEXT:    jne .LBB9_27
+; AVX512FVL-NEXT:  .LBB9_28: # %else26
+; AVX512FVL-NEXT:    testl $16384, %eax # imm = 0x4000
+; AVX512FVL-NEXT:    jne .LBB9_29
+; AVX512FVL-NEXT:  .LBB9_30: # %else28
+; AVX512FVL-NEXT:    testl $32768, %eax # imm = 0x8000
+; AVX512FVL-NEXT:    jne .LBB9_31
+; AVX512FVL-NEXT:  .LBB9_32: # %else30
+; AVX512FVL-NEXT:    vzeroupper
+; AVX512FVL-NEXT:    retq
+; AVX512FVL-NEXT:  .LBB9_1: # %cond.store
+; AVX512FVL-NEXT:    vpextrw $0, %xmm0, (%rdi)
+; AVX512FVL-NEXT:    testb $2, %a...
[truncated]

@RKSimon RKSimon merged commit 48a0bb7 into llvm:main Sep 25, 2025
9 checks passed
@RKSimon RKSimon deleted the x86-trunc-missing-prefixes branch September 25, 2025 13:20
mahesh-attarde pushed a commit to mahesh-attarde/llvm-project that referenced this pull request Oct 3, 2025
@RKSimon @mahesh-attarde
[X86] masked_store_trunc.ll - add missing prefixes (llvm#160685)
f4cf7ec 
Since llvm#159321 we now get actual warnings when we're missing coverage
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@RKSimon @llvmbot