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7 changes: 5 additions & 2 deletions llvm/lib/Target/X86/X86ISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -44615,8 +44615,11 @@ bool X86TargetLowering::SimplifyDemandedBitsForTargetNode(

APInt DemandedMask = OriginalDemandedBits << ShAmt;

// If we just want the sign bit then we don't need to shift it.
if (OriginalDemandedBits.isSignMask())
// If we only want bits that already match the signbit then we don't need
// to shift.
unsigned NumHiDemandedBits = BitWidth - OriginalDemandedBits.countr_zero();
if (TLO.DAG.ComputeNumSignBits(Op0, OriginalDemandedElts, Depth + 1) >=
NumHiDemandedBits)
return TLO.CombineTo(Op, Op0);

// fold (VSRAI (VSHLI X, C1), C1) --> X iff NumSignBits(X) > C1
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3 changes: 0 additions & 3 deletions llvm/test/CodeGen/X86/combine-pack.ll
Original file line number Diff line number Diff line change
Expand Up @@ -5,22 +5,19 @@

declare <8 x i16> @llvm.x86.sse2.packssdw.128(<4 x i32>, <4 x i32>)

; TODO: Failure to remove unnecessary signsplat
define <8 x i16> @combine_packss_v4i32_signsplat(<4 x i32> %a0, <4 x i32> %a1) {
; SSE-LABEL: combine_packss_v4i32_signsplat:
; SSE: # %bb.0:
; SSE-NEXT: pcmpgtd %xmm1, %xmm0
; SSE-NEXT: pcmpeqd %xmm1, %xmm1
; SSE-NEXT: packssdw %xmm1, %xmm0
; SSE-NEXT: psraw $15, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: combine_packss_v4i32_signsplat:
; AVX: # %bb.0:
; AVX-NEXT: vpcmpgtd %xmm1, %xmm0, %xmm0
; AVX-NEXT: vpcmpeqd %xmm1, %xmm1, %xmm1
; AVX-NEXT: vpackssdw %xmm1, %xmm0, %xmm0
; AVX-NEXT: vpsraw $15, %xmm0, %xmm0
; AVX-NEXT: retq
%cmp = icmp sgt <4 x i32> %a0, %a1
%ext = sext <4 x i1> %cmp to <4 x i32>
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