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10 changes: 5 additions & 5 deletions llvm/lib/Target/RISCV/RISCVGISel.td
Original file line number Diff line number Diff line change
Expand Up @@ -110,16 +110,16 @@ def : StPat<truncstorei8, SB, GPR, i16>;

let Predicates = [HasAtomicLdSt] in {
// Prefer unsigned due to no c.lb in Zcb.
def : LdPat<atomic_load_aext_8, LBU, i16>;
def : LdPat<atomic_load_nonext_16, LH, i16>;
def : LdPat<relaxed_load<atomic_load_aext_8>, LBU, i16>;
def : LdPat<relaxed_load<atomic_load_nonext_16>, LH, i16>;

def : StPat<atomic_store_8, SB, GPR, i16>;
def : StPat<atomic_store_16, SH, GPR, i16>;
def : StPat<relaxed_store<atomic_store_8>, SB, GPR, i16>;
def : StPat<relaxed_store<atomic_store_16>, SH, GPR, i16>;
}

let Predicates = [HasAtomicLdSt, IsRV64] in {
// Load pattern is in RISCVInstrInfoA.td and shared with RV32.
def : StPat<atomic_store_32, SW, GPR, i32>;
def : StPat<relaxed_store<atomic_store_32>, SW, GPR, i32>;
}

//===----------------------------------------------------------------------===//
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