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AMDGPU: Stop using the wavemask register class for SCC cross class copies #161801

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AMDGPU: Stop using the wavemask register class for SCC cross class copies #161801

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4 changes: 1 addition & 3 deletions llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -1118,9 +1118,7 @@ SIRegisterInfo::getPointerRegClass(unsigned Kind) const {

const TargetRegisterClass *
SIRegisterInfo::getCrossCopyRegClass(const TargetRegisterClass *RC) const {
if (RC == &AMDGPU::SCC_CLASSRegClass)
return getWaveMaskRegClass();
return RC;
return RC == &AMDGPU::SCC_CLASSRegClass ? &AMDGPU::SReg_32RegClass : RC;
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Shouldn't SCC_CLASS depend on the wavesize?

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No. These have nothing to do with each other. To extract a value into an allocatable register, a 32-bit SGPR is the natural choice

}

static unsigned getNumSubRegsForSpillOp(const MachineInstr &MI,
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