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[mlir][vector] Simplify rewrite pattern inheriting constructors. NFC. #161966

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Merged
merged 1 commit into from
Oct 4, 2025
Merged

[mlir][vector] Simplify rewrite pattern inheriting constructors. NFC. #161966

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2 changes: 1 addition & 1 deletion mlir/lib/Conversion/VectorToAMX/VectorToAMX.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -363,7 +363,7 @@ static TypedValue<VectorType> storeTile(PatternRewriter &rewriter,
}

struct ContractionToAMX : public OpRewritePattern<vector::ContractionOp> {
using OpRewritePattern::OpRewritePattern;
using Base::Base;

LogicalResult matchAndRewrite(vector::ContractionOp contractOp,
PatternRewriter &rewriter) const override {
Expand Down
26 changes: 13 additions & 13 deletions mlir/lib/Conversion/VectorToArmSME/VectorToArmSME.cpp
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Expand Up @@ -44,7 +44,7 @@ namespace {
/// arm_sme.tile_load ... layout<vertical>
struct TransferReadToArmSMELowering
: public OpRewritePattern<vector::TransferReadOp> {
using OpRewritePattern<vector::TransferReadOp>::OpRewritePattern;
using Base::Base;

LogicalResult matchAndRewrite(vector::TransferReadOp transferReadOp,
PatternRewriter &rewriter) const final {
Expand Down Expand Up @@ -120,7 +120,7 @@ struct TransferReadToArmSMELowering
/// : memref<?x?xi8>, vector<[16]x[16]xi8>
struct TransferWriteToArmSMELowering
: public OpRewritePattern<vector::TransferWriteOp> {
using OpRewritePattern<vector::TransferWriteOp>::OpRewritePattern;
using Base::Base;

LogicalResult matchAndRewrite(vector::TransferWriteOp writeOp,
PatternRewriter &rewriter) const final {
Expand Down Expand Up @@ -157,7 +157,7 @@ struct TransferWriteToArmSMELowering

/// Conversion pattern for vector.load.
struct VectorLoadToArmSMELowering : public OpRewritePattern<vector::LoadOp> {
using OpRewritePattern<vector::LoadOp>::OpRewritePattern;
using Base::Base;

LogicalResult matchAndRewrite(vector::LoadOp load,
PatternRewriter &rewriter) const override {
Expand All @@ -173,7 +173,7 @@ struct VectorLoadToArmSMELowering : public OpRewritePattern<vector::LoadOp> {

/// Conversion pattern for vector.store.
struct VectorStoreToArmSMELowering : public OpRewritePattern<vector::StoreOp> {
using OpRewritePattern<vector::StoreOp>::OpRewritePattern;
using Base::Base;

LogicalResult matchAndRewrite(vector::StoreOp store,
PatternRewriter &rewriter) const override {
Expand Down Expand Up @@ -208,7 +208,7 @@ struct VectorStoreToArmSMELowering : public OpRewritePattern<vector::StoreOp> {
/// Supports scalar, 0-d vector, and 1-d vector broadcasts.
struct BroadcastOpToArmSMELowering
: public OpRewritePattern<vector::BroadcastOp> {
using OpRewritePattern<vector::BroadcastOp>::OpRewritePattern;
using Base::Base;

LogicalResult matchAndRewrite(vector::BroadcastOp broadcastOp,
PatternRewriter &rewriter) const final {
Expand Down Expand Up @@ -279,7 +279,7 @@ struct BroadcastOpToArmSMELowering
/// implementation, perhaps with tile <-> vector (MOVA) ops.
struct TransposeOpToArmSMELowering
: public OpRewritePattern<vector::TransposeOp> {
using OpRewritePattern<vector::TransposeOp>::OpRewritePattern;
using Base::Base;

LogicalResult matchAndRewrite(vector::TransposeOp transposeOp,
PatternRewriter &rewriter) const final {
Expand Down Expand Up @@ -372,7 +372,7 @@ struct TransposeOpToArmSMELowering
struct VectorOuterProductToArmSMELowering
: public OpRewritePattern<vector::OuterProductOp> {

using OpRewritePattern<vector::OuterProductOp>::OpRewritePattern;
using Base::Base;

LogicalResult matchAndRewrite(vector::OuterProductOp outerProductOp,
PatternRewriter &rewriter) const override {
Expand Down Expand Up @@ -451,7 +451,7 @@ struct VectorOuterProductToArmSMELowering
/// ```
struct VectorExtractToArmSMELowering
: public OpRewritePattern<vector::ExtractOp> {
using OpRewritePattern<vector::ExtractOp>::OpRewritePattern;
using Base::Base;

LogicalResult matchAndRewrite(vector::ExtractOp extractOp,
PatternRewriter &rewriter) const override {
Expand Down Expand Up @@ -507,7 +507,7 @@ struct VectorExtractToArmSMELowering
/// ```
struct VectorInsertToArmSMELowering
: public OpRewritePattern<vector::InsertOp> {
using OpRewritePattern<vector::InsertOp>::OpRewritePattern;
using Base::Base;

LogicalResult matchAndRewrite(vector::InsertOp insertOp,
PatternRewriter &rewriter) const override {
Expand Down Expand Up @@ -568,7 +568,7 @@ struct VectorInsertToArmSMELowering
/// }
/// ```
struct VectorPrintToArmSMELowering : public OpRewritePattern<vector::PrintOp> {
using OpRewritePattern<vector::PrintOp>::OpRewritePattern;
using Base::Base;

LogicalResult matchAndRewrite(vector::PrintOp printOp,
PatternRewriter &rewriter) const override {
Expand Down Expand Up @@ -623,7 +623,7 @@ struct VectorPrintToArmSMELowering : public OpRewritePattern<vector::PrintOp> {
/// ```
struct FoldTransferWriteOfExtractTileSlice
: public OpRewritePattern<vector::TransferWriteOp> {
using OpRewritePattern<vector::TransferWriteOp>::OpRewritePattern;
using Base::Base;

LogicalResult matchAndRewrite(vector::TransferWriteOp writeOp,
PatternRewriter &rewriter) const final {
Expand Down Expand Up @@ -679,7 +679,7 @@ struct FoldTransferWriteOfExtractTileSlice
/// ```
struct ExtractFromCreateMaskToPselLowering
: public OpRewritePattern<vector::ExtractOp> {
using OpRewritePattern<vector::ExtractOp>::OpRewritePattern;
using Base::Base;

LogicalResult matchAndRewrite(vector::ExtractOp extractOp,
PatternRewriter &rewriter) const override {
Expand Down Expand Up @@ -734,7 +734,7 @@ struct ExtractFromCreateMaskToPselLowering
// Convert all `vector.splat` to `vector.broadcast`. There is a path from
// `vector.broadcast` to ArmSME via another pattern.
struct ConvertSplatToBroadcast : public OpRewritePattern<vector::SplatOp> {
using OpRewritePattern<vector::SplatOp>::OpRewritePattern;
using Base::Base;

LogicalResult matchAndRewrite(vector::SplatOp splatOp,
PatternRewriter &rewriter) const final {
Expand Down
4 changes: 2 additions & 2 deletions mlir/lib/Conversion/VectorToGPU/VectorToGPU.cpp
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Expand Up @@ -386,7 +386,7 @@ namespace {
// to MMA matmul.
struct PrepareContractToGPUMMA
: public OpRewritePattern<vector::ContractionOp> {
using OpRewritePattern<vector::ContractionOp>::OpRewritePattern;
using Base::Base;

LogicalResult matchAndRewrite(vector::ContractionOp op,
PatternRewriter &rewriter) const override {
Expand Down Expand Up @@ -450,7 +450,7 @@ struct PrepareContractToGPUMMA
// Shared Memory to registers.
struct CombineTransferReadOpTranspose final
: public OpRewritePattern<vector::TransposeOp> {
using OpRewritePattern<vector::TransposeOp>::OpRewritePattern;
using Base::Base;

LogicalResult matchAndRewrite(vector::TransposeOp op,
PatternRewriter &rewriter) const override {
Expand Down
4 changes: 2 additions & 2 deletions mlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
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Expand Up @@ -1342,7 +1342,7 @@ struct VectorScalableExtractOpLowering
/// ```
class VectorFMAOpNDRewritePattern : public OpRewritePattern<FMAOp> {
public:
using OpRewritePattern<FMAOp>::OpRewritePattern;
using Base::Base;

void initialize() {
// This pattern recursively unpacks one dimension at a time. The recursion
Expand Down Expand Up @@ -2127,7 +2127,7 @@ FailureOr<Value> ContractionOpToMatmulOpLowering::matchAndRewriteMaskableOp(
class TransposeOpToMatrixTransposeOpLowering
: public OpRewritePattern<vector::TransposeOp> {
public:
using OpRewritePattern<TransposeOp>::OpRewritePattern;
using Base::Base;

LogicalResult matchAndRewrite(vector::TransposeOp op,
PatternRewriter &rewriter) const override {
Expand Down
2 changes: 1 addition & 1 deletion mlir/lib/Conversion/VectorToSPIRV/VectorToSPIRV.cpp
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Expand Up @@ -838,7 +838,7 @@ struct VectorStoreOpConverter final

struct VectorReductionToIntDotProd final
: OpRewritePattern<vector::ReductionOp> {
using OpRewritePattern::OpRewritePattern;
using Base::Base;

LogicalResult matchAndRewrite(vector::ReductionOp op,
PatternRewriter &rewriter) const override {
Expand Down
14 changes: 7 additions & 7 deletions mlir/lib/Conversion/VectorToXeGPU/VectorToXeGPU.cpp
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Expand Up @@ -475,7 +475,7 @@ static LogicalResult lowerToScatteredStoreOp(vector::TransferWriteOp writeOp,
}

struct TransferReadLowering : public OpRewritePattern<vector::TransferReadOp> {
using OpRewritePattern<vector::TransferReadOp>::OpRewritePattern;
using Base::Base;

LogicalResult matchAndRewrite(vector::TransferReadOp readOp,
PatternRewriter &rewriter) const override {
Expand Down Expand Up @@ -546,7 +546,7 @@ struct TransferReadLowering : public OpRewritePattern<vector::TransferReadOp> {

struct TransferWriteLowering
: public OpRewritePattern<vector::TransferWriteOp> {
using OpRewritePattern<vector::TransferWriteOp>::OpRewritePattern;
using Base::Base;

LogicalResult matchAndRewrite(vector::TransferWriteOp writeOp,
PatternRewriter &rewriter) const override {
Expand Down Expand Up @@ -597,7 +597,7 @@ struct TransferWriteLowering
};

struct GatherLowering : public OpRewritePattern<vector::GatherOp> {
using OpRewritePattern<vector::GatherOp>::OpRewritePattern;
using Base::Base;

LogicalResult matchAndRewrite(vector::GatherOp gatherOp,
PatternRewriter &rewriter) const override {
Expand Down Expand Up @@ -632,7 +632,7 @@ struct GatherLowering : public OpRewritePattern<vector::GatherOp> {
};

struct ScatterLowering : public OpRewritePattern<vector::ScatterOp> {
using OpRewritePattern<vector::ScatterOp>::OpRewritePattern;
using Base::Base;

LogicalResult matchAndRewrite(vector::ScatterOp scatterOp,
PatternRewriter &rewriter) const override {
Expand Down Expand Up @@ -662,7 +662,7 @@ struct ScatterLowering : public OpRewritePattern<vector::ScatterOp> {
};

struct LoadLowering : public OpRewritePattern<vector::LoadOp> {
using OpRewritePattern<vector::LoadOp>::OpRewritePattern;
using Base::Base;

LogicalResult matchAndRewrite(vector::LoadOp loadOp,
PatternRewriter &rewriter) const override {
Expand Down Expand Up @@ -694,7 +694,7 @@ struct LoadLowering : public OpRewritePattern<vector::LoadOp> {
};

struct StoreLowering : public OpRewritePattern<vector::StoreOp> {
using OpRewritePattern<vector::StoreOp>::OpRewritePattern;
using Base::Base;

LogicalResult matchAndRewrite(vector::StoreOp storeOp,
PatternRewriter &rewriter) const override {
Expand Down Expand Up @@ -727,7 +727,7 @@ struct StoreLowering : public OpRewritePattern<vector::StoreOp> {
};

struct ContractionLowering : public OpRewritePattern<vector::ContractionOp> {
using OpRewritePattern<vector::ContractionOp>::OpRewritePattern;
using Base::Base;

LogicalResult matchAndRewrite(vector::ContractionOp contractOp,
PatternRewriter &rewriter) const override {
Expand Down