Skip to content
Merged
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
3 changes: 2 additions & 1 deletion llvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -3209,7 +3209,8 @@ static SDValue performAnyAllCombine(SDNode *N, SelectionDAG &DAG) {
using namespace llvm::SDPatternMatch;

SDValue LHS;
if (!sd_match(N->getOperand(1),
if (N->getNumOperands() < 2 ||
!sd_match(N->getOperand(1),
m_c_SetCC(m_Value(LHS), m_Zero(), m_CondCode())))
return SDValue();
EVT LT = LHS.getValueType();
Expand Down
13 changes: 13 additions & 0 deletions llvm/test/CodeGen/WebAssembly/simd-setcc-reductions.ll
Original file line number Diff line number Diff line change
Expand Up @@ -132,4 +132,17 @@ define i32 @all_true_2_4_i32(<4 x i32> %v) {
ret i32 %conv3
}

; Regression test for the intrinsic pattern matcher with nullary intrinsics
define i64 @other_intrinsic() #0 {
; CHECK-LABEL: other_intrinsic:
; CHECK: .functype other_intrinsic () -> (i64)
; CHECK-NEXT: # %bb.0: # %entry
; CHECK-NEXT: global.get $push0=, __tls_align
; CHECK-NEXT: return $pop0
entry:
%0 = call i64 @llvm.wasm.tls.align.i64()
ret i64 %0
}

attributes #0 = { "target-features"="+atomics" }