[DAG] Reassociate (add (add X, Y), X) --> add(add(X, X), Y) #162242
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Attempt to bring together self-additions, to help with folding to shift/mul/address patterns
RKSimon
commented
Oct 7, 2025
| ; GFX10-DL-NEXT: global_store_dword v2, v0, s[6:7] | ||
| ; GFX10-DL-NEXT: v_mov_b32_e32 v3, 0 | ||
| ; GFX10-DL-NEXT: v_add_nc_u32_e32 v0, v0, v0 | ||
| ; GFX10-DL-NEXT: v_mad_u32_u24 v0, v2, v1, v0 |
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I don't have the code in front of me but I think it's mostly done in IR in AMDGPUCodeGenPrepare. We'd like to form mul24 when only the low 24 bits of a regular mul are demanded, but I don't think there's an easy way to implement a target-specific demanded bits optimization for a generic node like MUL.
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I think we handle both AMDGPUCodeGenPrepare and a dag combine. We appear to be missing SimplifyDemandedBitsForTargetNode
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I can fine plenty in CGP/DAG for MUL24 but not much for MAD24
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Oh, the mad24 case I think is just a td pattern
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Attempt to bring together self-additions, to help with folding to shift/mul/address patterns