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[RISCV] Fix accidentally swapped operands in some PACKH+PACKW patterns. #162598

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Merged
merged 1 commit into from
Oct 9, 2025
+7 −7
Merged

[RISCV] Fix accidentally swapped operands in some PACKH+PACKW patterns. #162598

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8 changes: 4 additions & 4 deletions llvm/lib/Target/RISCV/RISCVInstrInfoZb.td
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Original file line number Diff line number Diff line change
Expand Up @@ -702,13 +702,13 @@ def : Pat<(binop_allwusers<or>
(PACKW GPR:$rs1, (XLenVT (PACKH GPR:$op1rs1, GPR:$op1rs2)))>;
def : Pat<(binop_allwusers<or>
(or (zexti16 (XLenVT GPR:$rs1)),
(shl GPR:$op1rs1, (XLenVT 24))),
(shl (zexti8 (XLenVT GPR:$op1rs2)), (XLenVT 16))),
(shl GPR:$op1rs2, (XLenVT 24))),
(shl (zexti8 (XLenVT GPR:$op1rs1)), (XLenVT 16))),
(PACKW GPR:$rs1, (XLenVT (PACKH GPR:$op1rs1, GPR:$op1rs2)))>;

def : Pat<(i64 (or (or (zexti16 (XLenVT GPR:$rs1)),
(shl (zexti8 (XLenVT GPR:$op1rs2)), (XLenVT 16))),
(sext_inreg (shl GPR:$op1rs1, (XLenVT 24)), i32))),
(shl (zexti8 (XLenVT GPR:$op1rs1)), (XLenVT 16))),
(sext_inreg (shl GPR:$op1rs2, (XLenVT 24)), i32))),
(PACKW GPR:$rs1, (XLenVT (PACKH GPR:$op1rs1, GPR:$op1rs2)))>;

// Match a pattern of 2 halfwords being inserted into bits [63:32], with bits
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6 changes: 3 additions & 3 deletions llvm/test/CodeGen/RISCV/rv64zbkb.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -441,7 +441,7 @@ define void @pack_lo_packh_hi_packh_2(i8 zeroext %0, i8 zeroext %1, i8 zeroext %
; RV64ZBKB-LABEL: pack_lo_packh_hi_packh_2:
; RV64ZBKB: # %bb.0:
; RV64ZBKB-NEXT: packh a0, a0, a1
; RV64ZBKB-NEXT: packh a1, a3, a2
; RV64ZBKB-NEXT: packh a1, a2, a3
; RV64ZBKB-NEXT: packw a0, a0, a1
; RV64ZBKB-NEXT: sw a0, 0(a4)
; RV64ZBKB-NEXT: ret
Expand Down Expand Up @@ -477,7 +477,7 @@ define void @pack_lo_packh_hi_packh_3(i8 %0, i8 %1, i8 %2, i8 %3, ptr %p) nounwi
; RV64ZBKB-LABEL: pack_lo_packh_hi_packh_3:
; RV64ZBKB: # %bb.0:
; RV64ZBKB-NEXT: packh a0, a0, a1
; RV64ZBKB-NEXT: packh a1, a3, a2
; RV64ZBKB-NEXT: packh a1, a2, a3
; RV64ZBKB-NEXT: packw a0, a0, a1
; RV64ZBKB-NEXT: sw a0, 0(a4)
; RV64ZBKB-NEXT: ret
Expand Down Expand Up @@ -509,7 +509,7 @@ define i32 @pack_lo_packh_hi_packh_4(i8 zeroext %0, i8 zeroext %1, i8 zeroext %2
; RV64ZBKB-LABEL: pack_lo_packh_hi_packh_4:
; RV64ZBKB: # %bb.0:
; RV64ZBKB-NEXT: packh a0, a0, a1
; RV64ZBKB-NEXT: packh a1, a3, a2
; RV64ZBKB-NEXT: packh a1, a2, a3
; RV64ZBKB-NEXT: packw a0, a0, a1
; RV64ZBKB-NEXT: ret
%a = zext i8 %0 to i32
Expand Down