release/21.x: [LLD] [COFF] Fix aarch64 delayimport of sret arguments (#163096) #163333

llvmbot · 2025-10-14T08:02:23Z

Backport 69b8d6d 7e69051

Requested by: @mstorsjo

llvm#161844) lld would fail with "error: relocation out of range" if the thunk was laid out more than 128 MB away from __delayLoadHelper2. This patch changes the call sequence to load the offset into a register and call through that, allowing for 32-bit offsets. Fixes llvm#161812 (cherry picked from commit 69b8d6d)

For sret arguments on aarch64, the x8 register is used as input parameter to functions, even though x8 normally isn't an input parameter register. When delayloading a DLL, the first call of a delayloaded function ends up calling a helper which resolves the function. Therefore, any input arguments to the actual function to be called need to be backed up and restored - this also includes x8. This matches how MS link.exe also changed its delayloading trampoline, between MSVC 2019 16.7 and 16.8 (between link.exe 14.27.29110.0 and 14.28.29333.0). This fixes running LLDB on aarch64 mingw, after ec28b95 and 93d3260. Those commits make LLDB load liblldb.dll with delayloading, and the first function to be called, SBDebugger::InitializeWithErrorHandling(), returns an SBError, which in the itanium C++ ABI is returned as an sret via a pointer in x8. (cherry picked from commit 7e69051)

llvmbot · 2025-10-14T08:02:33Z

@cjacek @zmodem What do you think about merging this PR to the release branch?

llvmbot · 2025-10-14T08:02:56Z

@llvm/pr-subscribers-platform-windows
@llvm/pr-subscribers-lld-coff

@llvm/pr-subscribers-lld

Author: None (llvmbot)

Changes

Backport 69b8d6d 7e69051

Requested by: @mstorsjo

Full diff: https://github.com/llvm/llvm-project/pull/163333.diff

3 Files Affected:

(modified) lld/COFF/DLL.cpp (+21-15)
(modified) lld/test/COFF/arm64-delayimport.yaml (+24-20)
(modified) lld/test/COFF/arm64x-delayimport.test (+48-40)

diff --git a/lld/COFF/DLL.cpp b/lld/COFF/DLL.cpp
index 3ce8853adb2a2..10bc898244a4a 100644
--- a/lld/COFF/DLL.cpp
+++ b/lld/COFF/DLL.cpp
@@ -320,30 +320,34 @@ static const uint8_t thunkARM64[] = {
 };
 
 static const uint8_t tailMergeARM64[] = {
-    0xfd, 0x7b, 0xb3, 0xa9, // stp     x29, x30, [sp, #-208]!
+    0xfd, 0x7b, 0xb2, 0xa9, // stp     x29, x30, [sp, #-224]!
     0xfd, 0x03, 0x00, 0x91, // mov     x29, sp
     0xe0, 0x07, 0x01, 0xa9, // stp     x0, x1, [sp, #16]
     0xe2, 0x0f, 0x02, 0xa9, // stp     x2, x3, [sp, #32]
     0xe4, 0x17, 0x03, 0xa9, // stp     x4, x5, [sp, #48]
     0xe6, 0x1f, 0x04, 0xa9, // stp     x6, x7, [sp, #64]
-    0xe0, 0x87, 0x02, 0xad, // stp     q0, q1, [sp, #80]
-    0xe2, 0x8f, 0x03, 0xad, // stp     q2, q3, [sp, #112]
-    0xe4, 0x97, 0x04, 0xad, // stp     q4, q5, [sp, #144]
-    0xe6, 0x9f, 0x05, 0xad, // stp     q6, q7, [sp, #176]
+    0xe8, 0x2b, 0x00, 0xf9, // str     x8,     [sp, #80]
+    0xe0, 0x07, 0x03, 0xad, // stp     q0, q1, [sp, #96]
+    0xe2, 0x0f, 0x04, 0xad, // stp     q2, q3, [sp, #128]
+    0xe4, 0x17, 0x05, 0xad, // stp     q4, q5, [sp, #160]
+    0xe6, 0x1f, 0x06, 0xad, // stp     q6, q7, [sp, #192]
     0xe1, 0x03, 0x11, 0xaa, // mov     x1, x17
     0x00, 0x00, 0x00, 0x90, // adrp    x0, #0     DELAY_IMPORT_DESCRIPTOR
     0x00, 0x00, 0x00, 0x91, // add     x0, x0, #0 :lo12:DELAY_IMPORT_DESCRIPTOR
-    0x00, 0x00, 0x00, 0x94, // bl      #0 __delayLoadHelper2
+    0x02, 0x00, 0x00, 0x90, // adrp    x2, #0     __delayLoadHelper2
+    0x42, 0x00, 0x00, 0x91, // add     x2, x2, #0 :lo12:__delayLoadHelper2
+    0x40, 0x00, 0x3f, 0xd6, // blr     x2
     0xf0, 0x03, 0x00, 0xaa, // mov     x16, x0
-    0xe6, 0x9f, 0x45, 0xad, // ldp     q6, q7, [sp, #176]
-    0xe4, 0x97, 0x44, 0xad, // ldp     q4, q5, [sp, #144]
-    0xe2, 0x8f, 0x43, 0xad, // ldp     q2, q3, [sp, #112]
-    0xe0, 0x87, 0x42, 0xad, // ldp     q0, q1, [sp, #80]
+    0xe6, 0x1f, 0x46, 0xad, // ldp     q6, q7, [sp, #192]
+    0xe4, 0x17, 0x45, 0xad, // ldp     q4, q5, [sp, #160]
+    0xe2, 0x0f, 0x44, 0xad, // ldp     q2, q3, [sp, #128]
+    0xe0, 0x07, 0x43, 0xad, // ldp     q0, q1, [sp, #96]
+    0xe8, 0x2b, 0x40, 0xf9, // ldr     x8,     [sp, #80]
     0xe6, 0x1f, 0x44, 0xa9, // ldp     x6, x7, [sp, #64]
     0xe4, 0x17, 0x43, 0xa9, // ldp     x4, x5, [sp, #48]
     0xe2, 0x0f, 0x42, 0xa9, // ldp     x2, x3, [sp, #32]
     0xe0, 0x07, 0x41, 0xa9, // ldp     x0, x1, [sp, #16]
-    0xfd, 0x7b, 0xcd, 0xa8, // ldp     x29, x30, [sp], #208
+    0xfd, 0x7b, 0xce, 0xa8, // ldp     x29, x30, [sp], #224
     0x00, 0x02, 0x1f, 0xd6, // br      x16
 };
 
@@ -554,10 +558,12 @@ class TailMergeChunkARM64 : public NonSectionCodeChunk {
 
   void writeTo(uint8_t *buf) const override {
     memcpy(buf, tailMergeARM64, sizeof(tailMergeARM64));
-    applyArm64Addr(buf + 44, desc->getRVA(), rva + 44, 12);
-    applyArm64Imm(buf + 48, desc->getRVA() & 0xfff, 0);
-    if (helper)
-      applyArm64Branch26(buf + 52, helper->getRVA() - rva - 52);
+    applyArm64Addr(buf + 48, desc->getRVA(), rva + 48, 12);
+    applyArm64Imm(buf + 52, desc->getRVA() & 0xfff, 0);
+    if (helper) {
+      applyArm64Addr(buf + 56, helper->getRVA(), rva + 56, 12);
+      applyArm64Imm(buf + 60, helper->getRVA() & 0xfff, 0);
+    }
   }
 
   Chunk *desc = nullptr;
diff --git a/lld/test/COFF/arm64-delayimport.yaml b/lld/test/COFF/arm64-delayimport.yaml
index abb9f25d5c379..5d26978db8be7 100644
--- a/lld/test/COFF/arm64-delayimport.yaml
+++ b/lld/test/COFF/arm64-delayimport.yaml
@@ -8,31 +8,35 @@
 # DISASM:  140001014:      d0000011        adrp    x17, 0x140003000
 # DISASM:  140001018:      91002231        add     x17, x17, #8
 # DISASM:  14000101c:      14000001        b       0x140001020 <.text+0x20>
-# DISASM:  140001020:      a9b37bfd        stp     x29, x30, [sp, #-208]!
+# DISASM:  140001020:      a9b27bfd        stp     x29, x30, [sp, #-224]!
 # DISASM:  140001024:      910003fd        mov     x29, sp
 # DISASM:  140001028:      a90107e0        stp     x0, x1, [sp, #16]
 # DISASM:  14000102c:      a9020fe2        stp     x2, x3, [sp, #32]
 # DISASM:  140001030:      a90317e4        stp     x4, x5, [sp, #48]
 # DISASM:  140001034:      a9041fe6        stp     x6, x7, [sp, #64]
-# DISASM:  140001038:      ad0287e0        stp     q0, q1, [sp, #80]
-# DISASM:  14000103c:      ad038fe2        stp     q2, q3, [sp, #112]
-# DISASM:  140001040:      ad0497e4        stp     q4, q5, [sp, #144]
-# DISASM:  140001044:      ad059fe6        stp     q6, q7, [sp, #176]
-# DISASM:  140001048:      aa1103e1        mov     x1, x17
-# DISASM:  14000104c:      b0000000        adrp    x0, 0x140002000
-# DISASM:  140001050:      91000000        add     x0, x0, #0
-# DISASM:  140001054:      97ffffeb        bl      0x140001000 <.text>
-# DISASM:  140001058:      aa0003f0        mov     x16, x0
-# DISASM:  14000105c:      ad459fe6        ldp     q6, q7, [sp, #176]
-# DISASM:  140001060:      ad4497e4        ldp     q4, q5, [sp, #144]
-# DISASM:  140001064:      ad438fe2        ldp     q2, q3, [sp, #112]
-# DISASM:  140001068:      ad4287e0        ldp     q0, q1, [sp, #80]
-# DISASM:  14000106c:      a9441fe6        ldp     x6, x7, [sp, #64]
-# DISASM:  140001070:      a94317e4        ldp     x4, x5, [sp, #48]
-# DISASM:  140001074:      a9420fe2        ldp     x2, x3, [sp, #32]
-# DISASM:  140001078:      a94107e0        ldp     x0, x1, [sp, #16]
-# DISASM:  14000107c:      a8cd7bfd        ldp     x29, x30, [sp], #208
-# DISASM:  140001080:      d61f0200        br      x16
+# DISASM:  140001038:      f9002be8        str     x8,     [sp, #80]
+# DISASM:  14000103c:      ad0307e0        stp     q0, q1, [sp, #96]
+# DISASM:  140001040:      ad040fe2        stp     q2, q3, [sp, #128]
+# DISASM:  140001044:      ad0517e4        stp     q4, q5, [sp, #160]
+# DISASM:  140001048:      ad061fe6        stp     q6, q7, [sp, #192]
+# DISASM:  14000104c:      aa1103e1        mov     x1, x17
+# DISASM:  140001050:      b0000000        adrp    x0, 0x140002000
+# DISASM:  140001054:      91000000        add     x0, x0, #0
+# DISASM:  140001058:      90000002        adrp    x2, 0x140001000 <.text>
+# DISASM:  14000105c:      91000042        add     x2, x2, #0
+# DISASM:  140001060:      d63f0040        blr     x2
+# DISASM:  140001064:      aa0003f0        mov     x16, x0
+# DISASM:  140001068:      ad461fe6        ldp     q6, q7, [sp, #192]
+# DISASM:  14000106c:      ad4517e4        ldp     q4, q5, [sp, #160]
+# DISASM:  140001070:      ad440fe2        ldp     q2, q3, [sp, #128]
+# DISASM:  140001074:      ad4307e0        ldp     q0, q1, [sp, #96]
+# DISASM:  140001078:      f9402be8        ldr     x8,     [sp, #80]
+# DISASM:  14000107c:      a9441fe6        ldp     x6, x7, [sp, #64]
+# DISASM:  140001080:      a94317e4        ldp     x4, x5, [sp, #48]
+# DISASM:  140001084:      a9420fe2        ldp     x2, x3, [sp, #32]
+# DISASM:  140001088:      a94107e0        ldp     x0, x1, [sp, #16]
+# DISASM:  14000108c:      a8ce7bfd        ldp     x29, x30, [sp], #224
+# DISASM:  140001090:      d61f0200        br      x16
 
 # IMPORTS: Format: COFF-ARM64
 # IMPORTS: Arch: aarch64
diff --git a/lld/test/COFF/arm64x-delayimport.test b/lld/test/COFF/arm64x-delayimport.test
index 2a68bce79baad..e705fb0efc455 100644
--- a/lld/test/COFF/arm64x-delayimport.test
+++ b/lld/test/COFF/arm64x-delayimport.test
@@ -61,31 +61,35 @@ DISASM-NEXT: 180001010: d61f0200     br      x16
 DISASM-NEXT: 180001014: b0000031     adrp    x17, 0x180006000
 DISASM-NEXT: 180001018: 91022231     add     x17, x17, #0x88
 DISASM-NEXT: 18000101c: 14000001     b       0x180001020 <.text+0x20>
-DISASM-NEXT: 180001020: a9b37bfd     stp     x29, x30, [sp, #-0xd0]!
+DISASM-NEXT: 180001020: a9b27bfd     stp     x29, x30, [sp, #-0xe0]!
 DISASM-NEXT: 180001024: 910003fd     mov     x29, sp
 DISASM-NEXT: 180001028: a90107e0     stp     x0, x1, [sp, #0x10]
 DISASM-NEXT: 18000102c: a9020fe2     stp     x2, x3, [sp, #0x20]
 DISASM-NEXT: 180001030: a90317e4     stp     x4, x5, [sp, #0x30]
 DISASM-NEXT: 180001034: a9041fe6     stp     x6, x7, [sp, #0x40]
-DISASM-NEXT: 180001038: ad0287e0     stp     q0, q1, [sp, #0x50]
-DISASM-NEXT: 18000103c: ad038fe2     stp     q2, q3, [sp, #0x70]
-DISASM-NEXT: 180001040: ad0497e4     stp     q4, q5, [sp, #0x90]
-DISASM-NEXT: 180001044: ad059fe6     stp     q6, q7, [sp, #0xb0]
-DISASM-NEXT: 180001048: aa1103e1     mov     x1, x17
-DISASM-NEXT: 18000104c: f0000000     adrp    x0, 0x180004000
-DISASM-NEXT: 180001050: 910d2000     add     x0, x0, #0x348
-DISASM-NEXT: 180001054: 97ffffeb     bl      0x180001000 <.text>
-DISASM-NEXT: 180001058: aa0003f0     mov     x16, x0
-DISASM-NEXT: 18000105c: ad459fe6     ldp     q6, q7, [sp, #0xb0]
-DISASM-NEXT: 180001060: ad4497e4     ldp     q4, q5, [sp, #0x90]
-DISASM-NEXT: 180001064: ad438fe2     ldp     q2, q3, [sp, #0x70]
-DISASM-NEXT: 180001068: ad4287e0     ldp     q0, q1, [sp, #0x50]
-DISASM-NEXT: 18000106c: a9441fe6     ldp     x6, x7, [sp, #0x40]
-DISASM-NEXT: 180001070: a94317e4     ldp     x4, x5, [sp, #0x30]
-DISASM-NEXT: 180001074: a9420fe2     ldp     x2, x3, [sp, #0x20]
-DISASM-NEXT: 180001078: a94107e0     ldp     x0, x1, [sp, #0x10]
-DISASM-NEXT: 18000107c: a8cd7bfd     ldp     x29, x30, [sp], #0xd0
-DISASM-NEXT: 180001080: d61f0200     br      x16
+DISASM-NEXT: 180001038: f9002be8     str     x8,     [sp, #0x50]
+DISASM-NEXT: 18000103c: ad0307e0     stp     q0, q1, [sp, #0x60]
+DISASM-NEXT: 180001040: ad040fe2     stp     q2, q3, [sp, #0x80]
+DISASM-NEXT: 180001044: ad0517e4     stp     q4, q5, [sp, #0xa0]
+DISASM-NEXT: 180001048: ad061fe6     stp     q6, q7, [sp, #0xc0]
+DISASM-NEXT: 18000104c: aa1103e1     mov     x1, x17
+DISASM-NEXT: 180001050: f0000000     adrp    x0, 0x180004000
+DISASM-NEXT: 180001054: 910d2000     add     x0, x0, #0x348
+DISASM-NEXT: 180001058: 90000002     adrp    x2, 0x180001000 <.text>
+DISASM-NEXT: 18000105c: 91000042     add     x2, x2, #0x0
+DISASM-NEXT: 180001060: d63f0040     blr     x2
+DISASM-NEXT: 180001064: aa0003f0     mov     x16, x0
+DISASM-NEXT: 180001068: ad461fe6     ldp     q6, q7, [sp, #0xc0]
+DISASM-NEXT: 18000106c: ad4517e4     ldp     q4, q5, [sp, #0xa0]
+DISASM-NEXT: 180001070: ad440fe2     ldp     q2, q3, [sp, #0x80]
+DISASM-NEXT: 180001074: ad4307e0     ldp     q0, q1, [sp, #0x60]
+DISASM-NEXT: 180001078: f9402be8     ldr     x8,     [sp, #0x50]
+DISASM-NEXT: 18000107c: a9441fe6     ldp     x6, x7, [sp, #0x40]
+DISASM-NEXT: 180001080: a94317e4     ldp     x4, x5, [sp, #0x30]
+DISASM-NEXT: 180001084: a9420fe2     ldp     x2, x3, [sp, #0x20]
+DISASM-NEXT: 180001088: a94107e0     ldp     x0, x1, [sp, #0x10]
+DISASM-NEXT: 18000108c: a8ce7bfd     ldp     x29, x30, [sp], #0xe0
+DISASM-NEXT: 180001090: d61f0200     br      x16
 DISASM-NEXT:                 ...
 DISASM-NEXT: 180002000: 52800040     mov     w0, #0x2                // =2
 DISASM-NEXT: 180002004: d65f03c0     ret
@@ -184,31 +188,35 @@ NATIVE-DISASM-NEXT: 180001010: d61f0200     br      x16
 NATIVE-DISASM-NEXT: 180001014: 90000031     adrp    x17, 0x180005000
 NATIVE-DISASM-NEXT: 180001018: 91022231     add     x17, x17, #0x88
 NATIVE-DISASM-NEXT: 18000101c: 14000001     b       0x180001020 <.text+0x20>
-NATIVE-DISASM-NEXT: 180001020: a9b37bfd     stp     x29, x30, [sp, #-0xd0]!
+NATIVE-DISASM-NEXT: 180001020: a9b27bfd     stp     x29, x30, [sp, #-0xe0]!
 NATIVE-DISASM-NEXT: 180001024: 910003fd     mov     x29, sp
 NATIVE-DISASM-NEXT: 180001028: a90107e0     stp     x0, x1, [sp, #0x10]
 NATIVE-DISASM-NEXT: 18000102c: a9020fe2     stp     x2, x3, [sp, #0x20]
 NATIVE-DISASM-NEXT: 180001030: a90317e4     stp     x4, x5, [sp, #0x30]
 NATIVE-DISASM-NEXT: 180001034: a9041fe6     stp     x6, x7, [sp, #0x40]
-NATIVE-DISASM-NEXT: 180001038: ad0287e0     stp     q0, q1, [sp, #0x50]
-NATIVE-DISASM-NEXT: 18000103c: ad038fe2     stp     q2, q3, [sp, #0x70]
-NATIVE-DISASM-NEXT: 180001040: ad0497e4     stp     q4, q5, [sp, #0x90]
-NATIVE-DISASM-NEXT: 180001044: ad059fe6     stp     q6, q7, [sp, #0xb0]
-NATIVE-DISASM-NEXT: 180001048: aa1103e1     mov     x1, x17
-NATIVE-DISASM-NEXT: 18000104c: d0000000     adrp    x0, 0x180003000
-NATIVE-DISASM-NEXT: 180001050: 910cc000     add     x0, x0, #0x330
-NATIVE-DISASM-NEXT: 180001054: 97ffffeb     bl      0x180001000 <.text>
-NATIVE-DISASM-NEXT: 180001058: aa0003f0     mov     x16, x0
-NATIVE-DISASM-NEXT: 18000105c: ad459fe6     ldp     q6, q7, [sp, #0xb0]
-NATIVE-DISASM-NEXT: 180001060: ad4497e4     ldp     q4, q5, [sp, #0x90]
-NATIVE-DISASM-NEXT: 180001064: ad438fe2     ldp     q2, q3, [sp, #0x70]
-NATIVE-DISASM-NEXT: 180001068: ad4287e0     ldp     q0, q1, [sp, #0x50]
-NATIVE-DISASM-NEXT: 18000106c: a9441fe6     ldp     x6, x7, [sp, #0x40]
-NATIVE-DISASM-NEXT: 180001070: a94317e4     ldp     x4, x5, [sp, #0x30]
-NATIVE-DISASM-NEXT: 180001074: a9420fe2     ldp     x2, x3, [sp, #0x20]
-NATIVE-DISASM-NEXT: 180001078: a94107e0     ldp     x0, x1, [sp, #0x10]
-NATIVE-DISASM-NEXT: 18000107c: a8cd7bfd     ldp     x29, x30, [sp], #0xd0
-NATIVE-DISASM-NEXT: 180001080: d61f0200     br      x16
+NATIVE-DISASM-NEXT: 180001038: f9002be8     str     x8,     [sp, #0x50]
+NATIVE-DISASM-NEXT: 18000103c: ad0307e0     stp     q0, q1, [sp, #0x60]
+NATIVE-DISASM-NEXT: 180001040: ad040fe2     stp     q2, q3, [sp, #0x80]
+NATIVE-DISASM-NEXT: 180001044: ad0517e4     stp     q4, q5, [sp, #0xa0]
+NATIVE-DISASM-NEXT: 180001048: ad061fe6     stp     q6, q7, [sp, #0xc0]
+NATIVE-DISASM-NEXT: 18000104c: aa1103e1     mov     x1, x17
+NATIVE-DISASM-NEXT: 180001050: d0000000     adrp    x0, 0x180003000
+NATIVE-DISASM-NEXT: 180001054: 910cc000     add     x0, x0, #0x330
+NATIVE-DISASM-NEXT: 180001058: 90000002     adrp    x2, 0x180001000 <.text>
+NATIVE-DISASM-NEXT: 18000105c: 91000042     add     x2, x2, #0x0
+NATIVE-DISASM-NEXT: 180001060: d63f0040     blr     x2
+NATIVE-DISASM-NEXT: 180001064: aa0003f0     mov     x16, x0
+NATIVE-DISASM-NEXT: 180001068: ad461fe6     ldp     q6, q7, [sp, #0xc0]
+NATIVE-DISASM-NEXT: 18000106c: ad4517e4     ldp     q4, q5, [sp, #0xa0]
+NATIVE-DISASM-NEXT: 180001070: ad440fe2     ldp     q2, q3, [sp, #0x80]
+NATIVE-DISASM-NEXT: 180001074: ad4307e0     ldp     q0, q1, [sp, #0x60]
+NATIVE-DISASM-NEXT: 180001078: f9402be8     ldr     x8,     [sp, #0x50]
+NATIVE-DISASM-NEXT: 18000107c: a9441fe6     ldp     x6, x7, [sp, #0x40]
+NATIVE-DISASM-NEXT: 180001080: a94317e4     ldp     x4, x5, [sp, #0x30]
+NATIVE-DISASM-NEXT: 180001084: a9420fe2     ldp     x2, x3, [sp, #0x20]
+NATIVE-DISASM-NEXT: 180001088: a94107e0     ldp     x0, x1, [sp, #0x10]
+NATIVE-DISASM-NEXT: 18000108c: a8ce7bfd     ldp     x29, x30, [sp], #0xe0
+NATIVE-DISASM-NEXT: 180001090: d61f0200     br      x16
 
 RUN: llvm-readobj --coff-load-config out-native.dll | FileCheck --check-prefix=NATIVE-LOADCFG %s
 NATIVE-LOADCFG:      AuxiliaryDelayloadIAT: 0x4000

zmodem

What do you think about merging this PR to the release branch?

Sounds good to me, as discussed on the original PR.

zmodem and others added 2 commits October 14, 2025 08:02

llvmbot added this to the LLVM 21.x Release milestone Oct 14, 2025

github-project-automation bot added this to LLVM Release Status Oct 14, 2025

github-project-automation bot moved this to Needs Triage in LLVM Release Status Oct 14, 2025

llvmbot added lld lld:COFF platform:windows labels Oct 14, 2025

llvmbot requested review from cjacek and zmodem October 14, 2025 08:02

llvmbot mentioned this pull request Oct 14, 2025

[LLD] [COFF] Fix aarch64 delayimport of sret arguments #163096

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zmodem approved these changes Oct 14, 2025

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github-project-automation bot moved this from Needs Triage to Needs Merge in LLVM Release Status Oct 14, 2025

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release/21.x: [LLD] [COFF] Fix aarch64 delayimport of sret arguments (#163096) #163333

release/21.x: [LLD] [COFF] Fix aarch64 delayimport of sret arguments (#163096) #163333

llvmbot commented Oct 14, 2025

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llvmbot commented Oct 14, 2025 •

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release/21.x: [LLD] [COFF] Fix aarch64 delayimport of sret arguments (#163096) #163333

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release/21.x: [LLD] [COFF] Fix aarch64 delayimport of sret arguments (#163096) #163333

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llvmbot commented Oct 14, 2025

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llvmbot commented Oct 14, 2025 •

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