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Currently, the only mention of 0d vectors in the MLIR source code that I could find was:

0D vectors are allowed by omitting the dimension: `vector<f32>`.

in BuiltinTypes.td.

This patch adds a summary of https://discourse.llvm.org/t/what-is-the-semantics-of-memref-0xf32-and-tensor-0xf32/3557 and https://discourse.llvm.org/t/should-we-have-0-d-vectors/3097/5.

@llvmbot llvmbot added the mlir label Nov 29, 2023
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llvmbot commented Nov 29, 2023

@llvm/pr-subscribers-mlir

Author: Rik Huijzer (rikhuijzer)

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Currently, the only mention of 0d vectors in the MLIR source code that I could find was:

> 0D vectors are allowed by omitting the dimension: vector&lt;f32&gt;.

in BuiltinTypes.td.

This patch adds a summary of https://discourse.llvm.org/t/what-is-the-semantics-of-memref-0xf32-and-tensor-0xf32/3557 and https://discourse.llvm.org/t/should-we-have-0-d-vectors/3097/5.


Full diff: https://github.com/llvm/llvm-project/pull/73792.diff

1 Files Affected:

  • (modified) mlir/docs/Dialects/Vector.md (+13-1)
diff --git a/mlir/docs/Dialects/Vector.md b/mlir/docs/Dialects/Vector.md
index a907d59566366bb..6d05d9b90467662 100644
--- a/mlir/docs/Dialects/Vector.md
+++ b/mlir/docs/Dialects/Vector.md
@@ -247,7 +247,19 @@ which conveys higher-D meaning. But it also is one of the most overloaded terms
 in compilers and hardware. For now, we generally use the `n-D` `vector` name and
 are open to better suggestions.
 
-## DeeperDive
+## 0D Vectors
+
+Vectors of dimension 0 (or _0-D vectors_ or _0D vectors_) are allowed inside
+MLIR. For instance, a `f32` vector containing one scalar can be denoted as
+`vector<f32>`. This is similar to the `tensor<f32>` type that is available in
+TensorFlow or the `memref<f32>` type that is available in MLIR.
+
+Generally, a 0D `vector` can be interpreted as a scalar. The benefit of 0D
+`vector`s, `tensor`s, and `memref`s is that they make it easier to lower code
+from various frontends such as TensorFlow and make it easier to handle corner
+cases such as unrolling a loop from 1D to 0D.
+
+## LLVM Lowering Tradeoffs
 
 This section describes the tradeoffs involved in lowering the MLIR n-D vector
 type and operations on it to LLVM-IR. Putting aside the

@rikhuijzer rikhuijzer merged commit f1fba63 into llvm:main Nov 30, 2023
@rikhuijzer rikhuijzer deleted the rh/0d-vector-doc branch November 30, 2023 09:11
banach-space added a commit to banach-space/llvm-project that referenced this pull request Aug 3, 2024
The link has been broken since llvm#73792. I've also rephrased the comment a
bit to better match the updated section heading.
banach-space added a commit that referenced this pull request Aug 5, 2024
The link has been "broken" since #73792 that updated
"## DeeperDive" to "## LLVM Lowering Tradeoffs".

This patch fixes the MD link for the affected sub-section:
* Before: [deeper dive section](#DeeperDive)
* After: [LLVM Lowering Tradeoffs](#llvm-lowering-tradeoffs)

I've also rephrased the surrounding comment a
bit - to better match the updated section name.
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4 participants