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[AMDGPU] Fix predicates for V_DOT instructions. #78198

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merged 1 commit into from
Jan 16, 2024

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@kosarev kosarev commented Jan 15, 2024

Resolves AsmParser ambiguities, e.g., between V_DOT4C_I32_I8_dpp_vi and V_DOT4C_I32_I8_dpp_gfx10. The latter is predicated with isGFX10Only while the first has no subtarget generation predicates.

Part of #69256.

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llvmbot commented Jan 15, 2024

@llvm/pr-subscribers-backend-amdgpu

Author: Ivan Kosarev (kosarev)

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Resolves AsmParser ambiguities, e.g., between V_DOT4C_I32_I8_dpp_vi and V_DOT4C_I32_I8_dpp_gfx10. The latter is predicated with isGFX10Only while the first has no subtarget generation predicates.

Part of <#69256>.


Full diff: https://github.com/llvm/llvm-project/pull/78198.diff

1 Files Affected:

  • (modified) llvm/lib/Target/AMDGPU/VOP2Instructions.td (+5-4)
diff --git a/llvm/lib/Target/AMDGPU/VOP2Instructions.td b/llvm/lib/Target/AMDGPU/VOP2Instructions.td
index 48d4e259bc1cec..bbb2ac0bdb861d 100644
--- a/llvm/lib/Target/AMDGPU/VOP2Instructions.td
+++ b/llvm/lib/Target/AMDGPU/VOP2Instructions.td
@@ -2512,6 +2512,7 @@ defm V_FMAAK_F32        : VOP2_Real_MADK_gfx940 <0x18>;
 }
 
 multiclass VOP2_Real_DOT_ACC_gfx9<bits<6> op> : Base_VOP2_Real_e32e64_vi<op> {
+  let SubtargetPredicate = isGFX9Only in
   def _dpp_vi : VOP2_DPP<op, !cast<VOP2_DPP_Pseudo>(NAME#"_dpp")>;
 }
 
@@ -2520,22 +2521,22 @@ multiclass VOP2_Real_DOT_ACC_gfx10<bits<6> op> :
   VOP2_Real_dpp_gfx10<op>,
   VOP2_Real_dpp8_gfx10<op>;
 
-let SubtargetPredicate = HasDot5Insts in {
+let OtherPredicates = [HasDot5Insts] in {
   defm V_DOT2C_F32_F16 : VOP2_Real_DOT_ACC_gfx9<0x37>;
   // NB: Opcode conflicts with V_DOT8C_I32_I4
   // This opcode exists in gfx 10.1* only
   defm V_DOT2C_F32_F16 : VOP2_Real_DOT_ACC_gfx10<0x02>;
 }
 
-let SubtargetPredicate = HasDot6Insts in {
+let OtherPredicates = [HasDot6Insts] in {
   defm V_DOT4C_I32_I8  : VOP2_Real_DOT_ACC_gfx9<0x39>;
   defm V_DOT4C_I32_I8  : VOP2_Real_DOT_ACC_gfx10<0x0d>;
 }
 
-let SubtargetPredicate = HasDot4Insts in {
+let OtherPredicates = [HasDot4Insts] in {
   defm V_DOT2C_I32_I16 : VOP2_Real_DOT_ACC_gfx9<0x38>;
 }
-let SubtargetPredicate = HasDot3Insts in {
+let OtherPredicates = [HasDot3Insts] in {
   defm V_DOT8C_I32_I4  : VOP2_Real_DOT_ACC_gfx9<0x3a>;
 }
 

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LGTM

Resolves AsmParser ambiguities, e.g., between V_DOT4C_I32_I8_dpp_vi and
V_DOT4C_I32_I8_dpp_gfx10. The latter is predicated with isGFX10Only while
the first has no subtarget generation predicates.

Part of <llvm#69256>.
@kosarev kosarev merged commit 03abf7f into llvm:main Jan 16, 2024
3 of 4 checks passed
@kosarev kosarev deleted the asmparser_fix_ambiguities branch January 16, 2024 21:23
justinfargnoli pushed a commit to justinfargnoli/llvm-project that referenced this pull request Jan 28, 2024
Resolves AsmParser ambiguities, e.g., between V_DOT4C_I32_I8_dpp_vi and
V_DOT4C_I32_I8_dpp_gfx10. The latter is predicated with isGFX10Only
while the first has no subtarget generation predicates.

Part of <llvm#69256>.
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4 participants