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[SelectionDAG] Add m_Neg and m_Not pattern matcher and update DAGCombiner #85365
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Thank you for submitting a Pull Request (PR) to the LLVM Project! This PR will be automatically labeled and the relevant teams will be If you wish to, you can add reviewers by using the "Reviewers" section on this page. If this is not working for you, it is probably because you do not have write If you have received no comments on your PR for a week, you can request a review If you have further questions, they may be answered by the LLVM GitHub User Guide. You can also ask questions in a comment on this PR, on the LLVM Discord or on the forums. |
@llvm/pr-subscribers-llvm-selectiondag Author: zicwangupa (ZiCong-Wang) ChangesResolves #85065 Full diff: https://github.com/llvm/llvm-project/pull/85365.diff 3 Files Affected:
diff --git a/llvm/include/llvm/CodeGen/SDPatternMatch.h b/llvm/include/llvm/CodeGen/SDPatternMatch.h
index a86c7400fa0945..2a475651b58a17 100644
--- a/llvm/include/llvm/CodeGen/SDPatternMatch.h
+++ b/llvm/include/llvm/CodeGen/SDPatternMatch.h
@@ -705,6 +705,20 @@ inline auto m_False() {
},
m_Value()};
}
+
+/// Match a negtive as a sub(0, v)
+template <typename ValTy>
+inline BinaryOpc_match<SpecificInt_match, ValTy>
+m_Neg(const ValTy &V) {
+ return m_Sub(m_Zero(), V);
+}
+
+/// Match a Not as a xor(v, 1) or xor(1, v)
+template <typename ValTy>
+inline BinaryOpc_match<SpecificInt_match, ValTy, true>
+m_Not(const ValTy &V) {
+ return m_Xor(m_AllOnes(), V);
+}
} // namespace SDPatternMatch
} // namespace llvm
#endif
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index 40b078a201ace6..df084b86087c32 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -2703,11 +2703,11 @@ SDValue DAGCombiner::visitADDLike(SDNode *N) {
SDValue A, B, C;
// fold ((0-A) + B) -> B-A
- if (sd_match(N0, m_Sub(m_Zero(), m_Value(A))))
+ if (sd_match(N0, m_Neg(m_Value(A))))
return DAG.getNode(ISD::SUB, DL, VT, N1, A);
// fold (A + (0-B)) -> A-B
- if (sd_match(N1, m_Sub(m_Zero(), m_Value(B))))
+ if (sd_match(N1, m_Neg(m_Value(B))))
return DAG.getNode(ISD::SUB, DL, VT, N0, B);
// fold (A+(B-A)) -> B
@@ -3812,7 +3812,7 @@ SDValue DAGCombiner::visitSUB(SDNode *N) {
return DAG.getNode(ISD::AND, DL, VT, N0, DAG.getNOT(DL, B, VT));
// fold (A - (-B * C)) -> (A + (B * C))
- if (sd_match(N1, m_OneUse(m_Mul(m_Sub(m_Zero(), m_Value(B)), m_Value(C)))))
+ if (sd_match(N1, m_OneUse(m_Mul(m_Neg(m_Value(B)), m_Value(C)))))
return DAG.getNode(ISD::ADD, DL, VT, N0,
DAG.getNode(ISD::MUL, DL, VT, B, C));
diff --git a/llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp b/llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
index 2b764c9e1f0fd6..372431f3080c8c 100644
--- a/llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
+++ b/llvm/unittests/CodeGen/SelectionDAGPatternMatchTest.cpp
@@ -174,10 +174,18 @@ TEST_F(SelectionDAGPatternMatchTest, matchUnaryOp) {
SDValue SExt = DAG->getNode(ISD::SIGN_EXTEND, DL, Int64VT, Op0);
SDValue Trunc = DAG->getNode(ISD::TRUNCATE, DL, Int32VT, Op1);
+ SDValue Zero = DAG->getConstant(0, DL, Int32VT);
+ SDValue AllOnes = DAG->getConstant(APInt::getAllOnes(32), DL, Int32VT);
+ SDValue Neg = DAG->getNode(ISD::SUB, DL, Int32VT, Zero, Op0);
+ SDValue Not = DAG->getNode(ISD::XOR, DL, Int32VT, AllOnes, Op0);
+
using namespace SDPatternMatch;
EXPECT_TRUE(sd_match(ZExt, m_UnaryOp(ISD::ZERO_EXTEND, m_Value())));
EXPECT_TRUE(sd_match(SExt, m_SExt(m_Value())));
EXPECT_TRUE(sd_match(Trunc, m_Trunc(m_Specific(Op1))));
+
+ EXPECT_TRUE(sd_match(Neg, m_Neg(m_Value())));
+ EXPECT_TRUE(sd_match(Not, m_Not(m_Value())));
}
TEST_F(SelectionDAGPatternMatchTest, matchConstants) {
|
✅ With the latest revision this PR passed the C/C++ code formatter. |
template <typename ValTy> | ||
inline BinaryOpc_match<SpecificInt_match, ValTy, true> | ||
m_Not(const ValTy &V) { | ||
return m_Xor(m_AllOnes(), V); |
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This should try matching the constant in the RHS operand, as that's canonical.
The IR pattern matchers have separate _c versions for versions that try to commute the inputs
Co-authored-by: Matt Arsenault <arsenm2@gmail.com>
@ZiCong-Wang Congratulations on having your first Pull Request (PR) merged into the LLVM Project! Your changes will be combined with recent changes from other authors, then tested Please check whether problems have been caused by your change specifically, as How to do this, and the rest of the post-merge process, is covered in detail here. If your change does cause a problem, it may be reverted, or you can revert it yourself. If you don't get any reports, no action is required from you. Your changes are working as expected, well done! |
…iner (llvm#85365) Resolves llvm#85065 --------- Co-authored-by: Matt Arsenault <arsenm2@gmail.com>
Resolves #85065