netronics/exp85.cpp: implemented rom mirroring, fixed interrupt handling timing #11884

fmilano · 2023-12-28T21:21:08Z

The Netronics Explorer-85 has dedicated circuitry for mirroring the monitor ROM to low memory (0x0000 -- 0x0800) after a system start/reset and during an interrupt. This logic was reproduced as accurately as possible, since the emulation of the intel 8085 does not have the pin outs needed for implementing the exact logic used in the original circuitry (IO/M, S0, S1 and ALE).
With the mirror switching working, it is possible to execute the MS BASIC ROM (it uses the low memory 8KB of RAM).

Another non-working feature was the step by step execution capability of the monitor program. This tracer uses a timer to interrupt the executing program once per instruction. In a real system the 8155 timer chip has a delay of around ~70ns (measured). This is enough for the next instruction cycle to start and for the interrupt to be acknowledged one instruction later. This effect is fundamental for the ROM monitor stepping functionality. This is solved with a MAME timer, dealying the 8155 to signal. The stepping mechanism is now working:

Implemented the ROM mirroring switch after boot and during interrupt handling.

src/mame/netronics/exp85.cpp

variables and functions, removed defined, introduced constexpr for constants.

on the top of the file.

src/mame/netronics/exp85.cpp

rb6502 · 2023-12-30T17:02:02Z

Thanks! Looks like one more bit of cleanup and we're good to go.

src/mame/netronics/exp85.cpp

switching between RAM and ROM mirroring.

cuavas

If there’s no better solution for the automatic bank switching than snooping on the 8085’s PC register, I think we can merge this.

cuavas · 2024-01-22T15:50:10Z

src/mame/netronics/exp85.cpp

+void exp85_state::status_out(u8 status)
+{
+	// In the real hardware this is monitored via the IO/M, S0, S1 
+	// and ALE output pins of the 8085.
+	// Since these pins are not emulated, then we must explicitly get the internal 
+	// interrupt acknowledge state (0x23 or 0x26) and behave as the monitor expects.
+	auto current_pc = m_maincpu->pc();
+	if (status == 0x23 || status == 0x26)
+	{
+		// When an interrupt is triggered the low memory shall be set to the ROM mirror
+		m_is_preparing_interrupt_call = true;
+		m_low_memory_view.select(LOW_MEMORY_ROM_MIRROR_ENTRY);
+	} 
+	else if (m_is_preparing_interrupt_call && (current_pc & 0xff00) == 0x0000)
+	{
+		// Avoids setting the lower memory back to RAM until
+		// it branches to the interrupt handler.
+		m_is_preparing_interrupt_call = false;
+	} 
+	else if (!m_is_preparing_interrupt_call && (current_pc & 0xf000) == 0xf000)
+	{
+		// When the interrupt handler is executing and the address is >= 0xf000
+		// the low memory is mapped to RAM
+		m_low_memory_view.select(LOW_MEMORY_RAM_ENTRY);
+	} 
+
+}


@ajrhacker are you happy with this as a temporary solution with the current state of the 8085 CPU device, or would you suggest another way of achieving this?

…ing timing (mamedev#11884) * Fixed interrupt management (allows step execution in the monitor) Implemented the ROM mirroring switch after boot and during interrupt handling. * Removed logging, renamed and reordered member variables and functions, removed defined, introduced constexpr for constants. * Corrected typos in instructions on the top of the file. * Replaced tags by object finders. * Replaced the memory bank for a memory view for switching between RAM and ROM mirroring.

Fixed interrupt management (allows step execution in the monitor)

70f4aab

Implemented the ROM mirroring switch after boot and during interrupt handling.

rb6502 reviewed Dec 28, 2023

View reviewed changes