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Op Code decoding

This is a clone of the tables located here in the event the website goes down.

Table "r" 8-bit registers Index 0 1 2 3 4 5 6 7 Value B C D E H L (HL) A Table "rp" Register pairs featuring SP Index 0 1 2 3 Value BC DE HL SP Table "rp2" Register pairs featuring AF Index 0 1 2 3 Value BC DE HL AF Table "cc" Conditions Index 0 1 2 3 Value NZ Z NC C Table "alu" Arithmetic/logic operations Index 0 1 2 3 4 5 6 7 Value ADD A, ADC A, SUB SBC A, AND XOR OR CP Table "rot" Rotation/shift operations Index 0 1 2 3 4 5 6 7 Value RLC RRC RL RR SLA SRA SWAP SRL

FOR x=0
z=0	y=0 NOP y=2 STOP y=1 LD (nn), SP y=3 JR d y=4..7 JR cc[y-4], d	Relative jumps and assorted ops
z=1	q=0 LD rp[p], nn q=1 ADD HL, rp[p]	16-bit load immediate/add
z=2	q=0 p=0 LD (BC), A p=2 LD (HL+), A p=1 LD (DE), A p=3 LD (HL-), A q=1 p=0 LD A, (BC) p=2 LD A, (HL+) p=1 LD A, (DE) p=3 LD A, (HL-)	Indirect loading
z=3	q=0 INC rp[p] q=1 DEC rp[p]	16-bit INC/DEC
z=4	INC r[y]	8-bit INC
z=5	DEC r[y]	8-bit DEC
z=6	LD r[y], n	8-bit load immediate
z=7	y=0 RLCA y=4 DAA y=1 RRCA y=5 CPL y=2 RLA y=6 SCF y=3 RRA y=7 CCF	Assorted operations on accumulator/flags
FOR x=1
	LD r[y], r[z]	8-bit loading
z=6	y=6 HALT	Exception (replaces LD (HL), (HL))
FOR x=2
	alu[y] r[z]	Operate on accumulator and register/memory location
FOR x=3
z=0	y=0..3 RET cc[y] y=4 LD (0xFF00 + n), A y=6 LD A, (0xFF00 + n) y=5 ADD SP, d y=7 LD HL, SP+ d	Conditional return, mem-mapped register loads and stack operations
z=1	q=0 POP rp2[p] q=1 p=0 RET p=2 JP HL p=1 RETI p=3 LD SP, HL	POP & various ops
z=2	y=0..3 JP cc[y], nn y=4 LD (0xFF00+C), A y=6 LD A, (0xFF00+C) y=5 LD (nn), A y=7 LD A, (nn)	Conditional jump
z=3	y=0 JP nn y=4 (removed) y=1 (CB prefix) y=5 (removed) y=2 (removed) y=6 DI y=3 (removed) y=7 EI	Assorted operations
z=4	y=0..3 CALL cc[y], nn y=4..7 (removed)	Conditional call
z=5	q=0 PUSH rp2[p] q=1 p=0 CALL nn p=1..3 (removed)	PUSH & various ops
z=6	alu[y] n	Operate on accumulator and immediate operand
z=7	RST y*8	Restart