Welcome to a hardware project born from the depth of frustration (as most projects are), oscilloscopes, and the desperate desire to generate clean consistent steps for a Transistor Curve Tracer without sacrificing sanity or signal integrity. This Verilog-powered FPGA project replaces noisy TTL counters and glitchy multivibrators with a crisp, isolated, glitch resistant digital step generator, all running on the Basys 3 FPGA.
This project started when I stumbled upon Paul's Curve Tracer. While not as versatile (at least not yet) as the traditional Tektronix 577 and 576 Curve Tracers, the Curve Tracer project aims supplement these devices by addressing the inherent bulkiness, cost, and inaccessibility of the obsolete replacement.
Inspired by its elegance, I set out to recreate it but with a few upgrades and generalizations, aiming to support both PNP and NPN devices, achieve better timing control, and accurate step and triangular waveform synchronization.
Things escalated quickly.
We first tried the analog route, connecting the synchronization pulses generated by the Triangle Waveform Generator to the Step Generation unit using our very own custom optoisolator. The optoisolation was achieved using an LED and a phototransistor-2N3904 NPN transistor in a Darlington pair configuration.
Sounds smart right? Well...it was smart, just not as practical as we'd imagined. Parasitic capacitance, false triggering and painfully slow recovery times as a result of the huge Miller Capacitance turned our dreams of isolation into a jittery and ringing mess.
But then two roads diverged in a breadboard,
And sorry I could not travel both
And be one traveler, long I stood
And took the one with a datasheet and actual specs...the CNY17 photoisolator package!
Although the glitches and the lack of speed persisted, the pinout diagrams and switching time charts helped demostify many of the mysteries and inconsistencies inherent in our custom optoisolator. By integrating an SN74LS221 monostable multivibrator, I significantly improved the quality of the clock signal, reducing jitter and virtually eliminating false triggers.
This partial success made one thing clear: there was still much more ground to cover. Precision and consistency were non-negotiable in designing a reliable measurement instrument, and to meet those demands, I turned to FPGAs. Their deterministic timing, reconfigurability, and fine-grained control offered a level of performance and flexibility that discrete logic simply could not match. And then came the Clock-Synchronized Step Generator on Basys 3.
This project implements a clock-synchronized digital step generator entirely on the Basys 3 board using Verilogamd Xilinx Vivado.
- Step counter that counts from 0 to a selectable number of steps (1 - 10)
- Step selection with switches via priority logic
- Edge detection and debouncing to work with external pulse
- Better noise immunity to accomodate jittery and ringing signals
- Outputs binary count with supported display on the on board 7-segment display
Simple transistor curve tracers typically share a ground reference between the collector supply (triangular waveform generator in our case) and the base supply (step generator), and that works fine for simple setups. But if you want to test both NPN and PNP devices using the same hardware setup, you need more flexibility, and I needed it as well.
To support both positive going and negative going steps relative to the Emitter terminal, this system isolates the step generator from the collector supply unit. Therefore, a simple selector switch can be used toggle between NPN and PNP modes without rewiring, as done in commercial grade curve tracers.
This system is composed of the following modules:
| Module | Function |
|---|---|
edge_detector_debounced |
Filters noise/glitches and detects rising edges from the external pulse input to output a clean pulse |
step_selector |
Determinrs the number of steps based on the highest active switch |
step_counter |
Counts from 0 up to the selected number of steps then resets |
seven_segment_display |
Displays the selected step count on the onboard 7-segement display |
top_module |
Integrates all modules and connects them to the Basys 3 board I/O for full operation |
This project includes fully featured testbenches for all modules with:
- automatic verification of expected results
- simulated noisy pulses with glitchy edges and jitter, as expected from the optoisolator
- modular tests for each module and a full system test
From the root folder FPGA_Step_Generator, you can access:
src: contains the modules that form the systemsim: contains thetestbenchfolder with the module testbenches and theresultsfolder with expected outputconstraints: contains the.xdcfile for the projectREADME.md: you are here! Provides the project summary
- Vivado : Or any tools to sythesize the design, implement it, generate the bitstream and program the device
- Basys 3 Board (Artix 7) : or any compatible programmable device
- External DAC or logic analyzer: I made mine out of a R2R ladder and op-amps for buffering and calibrating the steps
- Oscilloscope: a bonus for testing and circuit debugging
You can generalize this step generator for almost any precise, pulse-driven signal generation where isolation and noise immunity are critical, and that is the beauty of FPGAs. One of the exciting next steps for this project is to build a software backend to control the system. This would allow for:
- dynamic step configuration through a PC interface
- trigger diagnostics and logging including pulse timing and step response
- GUI-based control panel for live tuning and configuration
This started as a humble attempt to design a system to help debug transistors, and turned into hardware design, isolation, adn digital pulse precision. If you are tired of flaky counters adn signal noise ruining your staircase wave generation dreams, this project might just save you.
and it looks even prettier on the scope!
This project is licensed under the MIT License.
Free to use, modify, and share for educational and experimental purposes.
Go build something cool.
Big thanks to the following heroes of engineering, documentation, and patience:
- Paul's Curve Tracer - For inspiring the first clunky, smoke prone but brilliant iteration of a step generator. We stood on the shoulders of that homebrew analog-TTL beast.
- Xilinx Vivado - For turning the HDL code to hardware magic
- Basys 3 Board and Reference Manual - For being the gateway to the Xilinx Vivado Design Suite, laden with treats like switches, PMODs and the seven segment, all crucial for this project
- Excalidraw - For making the sketches of chaootic ideas somehow look presentable in illustrations
- Any Engineer Who Ever Wrote About Debouncing - You probably saved me from reinventing a bouncy wheel