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VexRiscv
VexRiscv PublicForked from SpinalHDL/VexRiscv
A FPGA friendly 32 bit RISC-V CPU implementation
Assembly
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Spinal-bootcamp
Spinal-bootcamp PublicForked from jijingg/Spinal-bootcamp
SpinalHDL-tutorial based on Jupyter Notebook
Jupyter Notebook
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SpinalWorkshop
SpinalWorkshop PublicForked from SpinalHDL/SpinalWorkshop
Labs to learn SpinalHDL
Scala
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SpinalDoc-RTD
SpinalDoc-RTD PublicForked from SpinalHDL/SpinalDoc-RTD
The sources of the online SpinalHDL doc
Python
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