nrfconnect · mstasiaknordic · Sep 9, 2025 · Sep 30, 2025 · Sep 30, 2025 · Sep 30, 2025
diff --git a/drivers/spi/Kconfig.nrfx b/drivers/spi/Kconfig.nrfx
@@ -22,29 +22,7 @@ config SPI_NRFX_SPI
 config SPI_NRFX_SPIM
 	def_bool y
 	depends on DT_HAS_NORDIC_NRF_SPIM_ENABLED
-	select NRFX_SPIM0 if HAS_HW_NRF_SPIM0
-	select NRFX_SPIM1 if HAS_HW_NRF_SPIM1
-	select NRFX_SPIM2 if HAS_HW_NRF_SPIM2
-	select NRFX_SPIM3 if HAS_HW_NRF_SPIM3
-	select NRFX_SPIM4 if HAS_HW_NRF_SPIM4
-	select NRFX_SPIM00 if HAS_HW_NRF_SPIM00
-	select NRFX_SPIM01 if HAS_HW_NRF_SPIM01
-	select NRFX_SPIM20 if HAS_HW_NRF_SPIM20
-	select NRFX_SPIM21 if HAS_HW_NRF_SPIM21
-	select NRFX_SPIM22 if HAS_HW_NRF_SPIM22
-	select NRFX_SPIM23 if HAS_HW_NRF_SPIM23
-	select NRFX_SPIM24 if HAS_HW_NRF_SPIM24
-	select NRFX_SPIM30 if HAS_HW_NRF_SPIM30
-	select NRFX_SPIM120 if HAS_HW_NRF_SPIM120
-	select NRFX_SPIM121 if HAS_HW_NRF_SPIM121
-	select NRFX_SPIM130 if HAS_HW_NRF_SPIM130
-	select NRFX_SPIM131 if HAS_HW_NRF_SPIM131
-	select NRFX_SPIM132 if HAS_HW_NRF_SPIM132
-	select NRFX_SPIM133 if HAS_HW_NRF_SPIM133
-	select NRFX_SPIM134 if HAS_HW_NRF_SPIM134
-	select NRFX_SPIM135 if HAS_HW_NRF_SPIM135
-	select NRFX_SPIM136 if HAS_HW_NRF_SPIM136
-	select NRFX_SPIM137 if HAS_HW_NRF_SPIM137
+	select NRFX_SPIM
 
 config SPI_NRFX_SPIS
 	def_bool y

diff --git a/drivers/spi/spi_nrfx_spim.c b/drivers/spi/spi_nrfx_spim.c
@@ -4,6 +4,8 @@
  * SPDX-License-Identifier: Apache-2.0
  */
 
+#define DT_DRV_COMPAT nordic_nrf_spim
+
 #include <zephyr/drivers/spi.h>
 #include <zephyr/drivers/spi/rtio.h>
 #include <zephyr/cache.h>
@@ -41,36 +43,21 @@
 #define SPI_BUFFER_IN_RAM 1
 #endif
 
-/*
- * We use NODELABEL here because the nrfx API requires us to call
- * functions which are named according to SoC peripheral instance
- * being operated on. Since DT_INST() makes no guarantees about that,
- * it won't work.
- */
-#define SPIM(idx)			DT_NODELABEL(spi##idx)
-#define SPIM_PROP(idx, prop)		DT_PROP(SPIM(idx), prop)
-#define SPIM_HAS_PROP(idx, prop)	DT_NODE_HAS_PROP(SPIM(idx), prop)
-
-/* Execute macro f(x) for all instances. */
-#define SPIM_FOR_EACH_INSTANCE(f, sep, off_code, ...) \
-	NRFX_FOREACH_PRESENT(SPIM, f, sep, off_code, __VA_ARGS__)
-
 /* Only CPUAPP and CPURAD can control clocks and power domains, so if a fast instance is
  * used by other cores, treat the SPIM like a normal one. This presumes the CPUAPP or CPURAD
  * have requested the clocks and power domains needed by the fast instance to be ACTIVE before
  * other cores use the fast instance.
  */
 #if CONFIG_SOC_NRF54H20_CPUAPP || CONFIG_SOC_NRF54H20_CPURAD
-#define INSTANCE_IS_FAST(unused, prefix, idx, _)						\
-	UTIL_AND(										\
-		UTIL_AND(									\
-			IS_ENABLED(CONFIG_HAS_HW_NRF_SPIM##prefix##idx),			\
-			NRF_DT_IS_FAST(SPIM(idx))						\
-		),										\
-		IS_ENABLED(CONFIG_CLOCK_CONTROL)						\
+#define INSTANCE_IS_FAST(inst)					\
+	UTIL_AND(						\
+		NRF_DT_INST_IS_FAST(inst),			\
+		IS_ENABLED(CONFIG_CLOCK_CONTROL)		\
 	)
 
-#if SPIM_FOR_EACH_INSTANCE(INSTANCE_IS_FAST, (||), (0))
+#define INSTANCE_IS_FAST_OR(inst) INSTANCE_IS_FAST(inst) ||
+
+#if (DT_INST_FOREACH_STATUS_OKAY(INSTANCE_IS_FAST_OR) 0)
 #define SPIM_ANY_FAST 1
 /* If fast instances are used then system managed device PM cannot be used because
  * it may call PM actions from locked context and fast SPIM PM actions can only be
@@ -80,12 +67,12 @@
 #endif
 #endif
 
-#define SPIM_PINS_CROSS_DOMAIN(unused, prefix, idx, _)			\
-	COND_CODE_1(DT_NODE_HAS_STATUS_OKAY(SPIM(prefix##idx)),		\
-		   (SPIM_PROP(idx, cross_domain_pins_supported)),	\
-		   (0))
+#define SPIM_PINS_CROSS_DOMAIN(inst)			\
+	DT_INST_PROP(inst, cross_domain_pins_supported)
 
-#if NRFX_FOREACH_PRESENT(SPIM, SPIM_PINS_CROSS_DOMAIN, (||), (0))
+#define SPIM_PINS_CROSS_DOMAIN_OR(inst)	SPIM_PINS_CROSS_DOMAIN(inst) ||
+
+#if (DT_INST_FOREACH_STATUS_OKAY(SPIM_PINS_CROSS_DOMAIN_OR) 0)
 #include <hal/nrf_gpio.h>
 /* Certain SPIM instances support usage of cross domain pins in form of dedicated pins on
  * a port different from the default one.
@@ -103,7 +90,8 @@
 
 
 struct spi_nrfx_data {
+	nrfx_spim_t	   spim;
 	struct spi_context ctx;
 	const struct device *dev;
 	size_t  chunk_len;
 	bool    busy;
@@ -123,7 +111,6 @@
 };
 
 struct spi_nrfx_config {
-	nrfx_spim_t	   spim;
 	uint32_t	   max_freq;
 	nrfx_spim_config_t def_config;
 	void (*irq_connect)(void);
@@ -221,8 +208,7 @@
 static inline void finalize_spi_transaction(const struct device *dev, bool deactivate_cs)
 {
 	struct spi_nrfx_data *dev_data = dev->data;
-	const struct spi_nrfx_config *dev_config = dev->config;
-	void *reg = dev_config->spim.p_reg;
+	void *reg = dev_data->spim.p_reg;
 
 	if (deactivate_cs) {
 		spi_context_cs_control(&dev_data->ctx, false);
@@ -301,7 +287,7 @@
 	struct spi_context *ctx = &dev_data->ctx;
 	uint32_t max_freq = dev_config->max_freq;
 	nrfx_spim_config_t config;
-	nrfx_err_t result;
+	int result;
 	uint32_t sck_pin;
 
 	if (dev_data->initialized && spi_context_configured(ctx, spi_cfg)) {
@@ -359,22 +345,22 @@
 	config.mode      = get_nrf_spim_mode(spi_cfg->operation);
 	config.bit_order = get_nrf_spim_bit_order(spi_cfg->operation);
 
-	sck_pin = nrfy_spim_sck_pin_get(dev_config->spim.p_reg);
+	sck_pin = nrfy_spim_sck_pin_get(dev_data->spim.p_reg);
 
 	if (sck_pin != NRF_SPIM_PIN_NOT_CONNECTED) {
 		nrfy_gpio_pin_write(sck_pin, spi_cfg->operation & SPI_MODE_CPOL ? 1 : 0);
 	}
 
 	if (dev_data->initialized) {
-		nrfx_spim_uninit(&dev_config->spim);
+		nrfx_spim_uninit(&dev_data->spim);
 		dev_data->initialized = false;
 	}
 
-	result = nrfx_spim_init(&dev_config->spim, &config,
+	result = nrfx_spim_init(&dev_data->spim, &config,
 				event_handler, (void *)dev);
-	if (result != NRFX_SUCCESS) {
-		LOG_ERR("Failed to initialize nrfx driver: %08x", result);
-		return -EIO;
+	if (result < 0) {
+		LOG_ERR("Failed to initialize nrfx driver: %d", result);
+		return result;
 	}
 
 	dev_data->initialized = true;
@@ -496,7 +482,6 @@
 
 	if (chunk_len > 0) {
 		nrfx_spim_xfer_desc_t xfer;
-		nrfx_err_t result;
 		const uint8_t *tx_buf = ctx->tx_buf;
 		uint8_t *rx_buf = ctx->rx_buf;
 
@@ -506,7 +491,7 @@
 
 #ifdef SPI_BUFFER_IN_RAM
 		if (spi_context_tx_buf_on(ctx) &&
-		    !nrf_dma_accessible_check(&dev_config->spim.p_reg, tx_buf)) {
+		    !nrf_dma_accessible_check(&dev_data->spim.p_reg, tx_buf)) {
 
 			if (chunk_len > CONFIG_SPI_NRFX_RAM_BUFFER_SIZE) {
 				chunk_len = CONFIG_SPI_NRFX_RAM_BUFFER_SIZE;
@@ -517,7 +502,7 @@
 		}
 
 		if (spi_context_rx_buf_on(ctx) &&
-		    !nrf_dma_accessible_check(&dev_config->spim.p_reg, rx_buf)) {
+		    !nrf_dma_accessible_check(&dev_data->spim.p_reg, rx_buf)) {
 
 			if (chunk_len > CONFIG_SPI_NRFX_RAM_BUFFER_SIZE) {
 				chunk_len = CONFIG_SPI_NRFX_RAM_BUFFER_SIZE;
@@ -556,11 +541,10 @@
 		}
 #endif
 		if (error == 0) {
-			result = nrfx_spim_xfer(&dev_config->spim, &xfer, 0);
-			if (result == NRFX_SUCCESS) {
+			error = nrfx_spim_xfer(&dev_data->spim, &xfer, 0);
+			if (error == 0) {
 				return;
 			}
-			error = -EIO;
 #ifdef CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58
 			anomaly_58_workaround_clear(dev_data);
 #endif
@@ -632,7 +616,7 @@
 {
 	struct spi_nrfx_data *dev_data = dev->data;
 	const struct spi_nrfx_config *dev_config = dev->config;
-	void *reg = dev_config->spim.p_reg;
+	void *reg = dev_data->spim.p_reg;
 	int error;
 
 	pm_device_runtime_get(dev);
@@ -678,7 +662,7 @@
 			/* Abort the current transfer by deinitializing
 			 * the nrfx driver.
 			 */
-			nrfx_spim_uninit(&dev_config->spim);
+			nrfx_spim_uninit(&dev_data->spim);
 			dev_data->initialized = false;
 
 			/* Make sure the transaction is finished (it may be
@@ -795,7 +779,7 @@
 	struct spi_nrfx_data *dev_data = dev->data;
 
 	if (dev_data->initialized) {
-		nrfx_spim_uninit(&dev_config->spim);
+		nrfx_spim_uninit(&dev_data->spim);
 		dev_data->initialized = false;
 	}
 
@@ -897,100 +881,97 @@
 	return 0;
 }
 
-#define SPI_NRFX_SPIM_EXTENDED_CONFIG(idx)				\
+#define SPI_NRFX_SPIM_EXTENDED_CONFIG(inst)				\
 	IF_ENABLED(NRFX_SPIM_EXTENDED_ENABLED,				\
 		(.dcx_pin = NRF_SPIM_PIN_NOT_CONNECTED,			\
-		 COND_CODE_1(SPIM_PROP(idx, rx_delay_supported),	\
-			     (.rx_delay = SPIM_PROP(idx, rx_delay),),	\
+		 COND_CODE_1(DT_INST_PROP(inst, rx_delay_supported),	\
+			     (.rx_delay = DT_INST_PROP(inst, rx_delay),),	\
 			     ())					\
 		))
 
 /* Get initialization priority of an instance. Instances that requires clock control
  * which is using nrfs (IPC) are initialized later.
  */
-#define SPIM_INIT_PRIORITY(idx) \
-	COND_CODE_1(INSTANCE_IS_FAST(_, /*empty*/, idx, _), \
+#define SPIM_INIT_PRIORITY(inst) \
+	COND_CODE_1(INSTANCE_IS_FAST(inst), \
 		(UTIL_INC(CONFIG_CLOCK_CONTROL_NRF_HSFLL_GLOBAL_INIT_PRIORITY)), \
 		(CONFIG_SPI_INIT_PRIORITY))
 
-#define SPI_NRFX_SPIM_DEFINE(idx)					       \
-	NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP(SPIM(idx));			       \
-	NRF_DT_CHECK_NODE_HAS_REQUIRED_MEMORY_REGIONS(SPIM(idx));	       \
-	static void irq_connect##idx(void)				       \
-	{								       \
-		IRQ_CONNECT(DT_IRQN(SPIM(idx)), DT_IRQ(SPIM(idx), priority),   \
-			    nrfx_isr, nrfx_spim_##idx##_irq_handler, 0);       \
-	}								       \
+#define SPI_NRFX_SPIM_DEFINE(inst)					       \
+	NRF_DT_CHECK_NODE_HAS_PINCTRL_SLEEP(DT_DRV_INST(inst));		       \
+	NRF_DT_CHECK_NODE_HAS_REQUIRED_MEMORY_REGIONS(DT_DRV_INST(inst));      \
 	IF_ENABLED(SPI_BUFFER_IN_RAM,					       \
-		(static uint8_t spim_##idx##_tx_buffer			       \
+		(static uint8_t spim_##inst##_tx_buffer			       \
 			[CONFIG_SPI_NRFX_RAM_BUFFER_SIZE]		       \
-			DMM_MEMORY_SECTION(SPIM(idx));			       \
-		 static uint8_t spim_##idx##_rx_buffer			       \
+			DMM_MEMORY_SECTION(DT_DRV_INST(inst));		       \
+		 static uint8_t spim_##inst##_rx_buffer			       \
 			[CONFIG_SPI_NRFX_RAM_BUFFER_SIZE]		       \
-			DMM_MEMORY_SECTION(SPIM(idx));))		       \
-	static struct spi_nrfx_data spi_##idx##_data = {		       \
+			DMM_MEMORY_SECTION(DT_DRV_INST(inst));))	       \
+	static struct spi_nrfx_data spi_##inst##_data = {		       \
+		.spim = NRFX_SPIM_INSTANCE(DT_INST_REG_ADDR(inst)),	       \
 		IF_ENABLED(CONFIG_MULTITHREADING,			       \
-			(SPI_CONTEXT_INIT_LOCK(spi_##idx##_data, ctx),))       \
+			(SPI_CONTEXT_INIT_LOCK(spi_##inst##_data, ctx),))      \
 		IF_ENABLED(CONFIG_MULTITHREADING,			       \
-			(SPI_CONTEXT_INIT_SYNC(spi_##idx##_data, ctx),))       \
-		SPI_CONTEXT_CS_GPIOS_INITIALIZE(SPIM(idx), ctx)		       \
+			(SPI_CONTEXT_INIT_SYNC(spi_##inst##_data, ctx),))      \
+		SPI_CONTEXT_CS_GPIOS_INITIALIZE(DT_DRV_INST(inst), ctx)	       \
 		IF_ENABLED(SPI_BUFFER_IN_RAM,				       \
-			(.tx_buffer = spim_##idx##_tx_buffer,		       \
-			 .rx_buffer = spim_##idx##_rx_buffer,))		       \
-		.dev  = DEVICE_DT_GET(SPIM(idx)),			       \
+			(.tx_buffer = spim_##inst##_tx_buffer,		       \
+			 .rx_buffer = spim_##inst##_rx_buffer,))	       \
+		.dev  = DEVICE_DT_GET(DT_DRV_INST(inst)),		       \
 		.busy = false,						       \
 	};								       \
-	PINCTRL_DT_DEFINE(SPIM(idx));					       \
-	static const struct spi_nrfx_config spi_##idx##z_config = {	       \
-		.spim = {						       \
-			.p_reg = (NRF_SPIM_Type *)DT_REG_ADDR(SPIM(idx)),      \
-			.drv_inst_idx = NRFX_SPIM##idx##_INST_IDX,	       \
-		},							       \
-		.max_freq = SPIM_PROP(idx, max_frequency),		       \
+	static void irq_connect##inst(void)				       \
+	{								       \
+		IRQ_CONNECT(DT_INST_IRQN(inst), DT_INST_IRQ(inst, priority),   \
+			nrfx_spim_irq_handler, &spi_##inst##_data.spim, 0);    \
+	}								       \
+	PINCTRL_DT_INST_DEFINE(inst);					       \
+	static const struct spi_nrfx_config spi_##inst##z_config = {	       \
+		.max_freq = DT_INST_PROP(inst, max_frequency),		       \
 		.def_config = {						       \
 			.skip_gpio_cfg = true,				       \
 			.skip_psel_cfg = true,				       \
 			.ss_pin = NRF_SPIM_PIN_NOT_CONNECTED,		       \
-			.orc    = SPIM_PROP(idx, overrun_character),	       \
-			SPI_NRFX_SPIM_EXTENDED_CONFIG(idx)		       \
+			.orc    = DT_INST_PROP(inst, overrun_character),       \
+			SPI_NRFX_SPIM_EXTENDED_CONFIG(inst)		       \
 		},							       \
-		.irq_connect = irq_connect##idx,			       \
-		.pcfg = PINCTRL_DT_DEV_CONFIG_GET(SPIM(idx)),		       \
-		.max_chunk_len = BIT_MASK(SPIM_PROP(idx, easydma_maxcnt_bits)),\
+		.irq_connect = irq_connect##inst,			       \
+		.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(inst),		       \
+		.max_chunk_len = BIT_MASK(				       \
+			DT_INST_PROP(inst, easydma_maxcnt_bits)),	       \
 		COND_CODE_1(CONFIG_SOC_NRF52832_ALLOW_SPIM_DESPITE_PAN_58,     \
 			(.anomaly_58_workaround =			       \
-				SPIM_PROP(idx, anomaly_58_workaround),),       \
+				DT_INST_PROP(inst, anomaly_58_workaround),),   \
 			())						       \
-		.wake_pin = NRF_DT_GPIOS_TO_PSEL_OR(SPIM(idx), wake_gpios,     \
+		.wake_pin = NRF_DT_GPIOS_TO_PSEL_OR(DT_DRV_INST(inst),	       \
+						    wake_gpios,		       \
 						    WAKE_PIN_NOT_USED),	       \
-		.wake_gpiote = WAKE_GPIOTE_INSTANCE(SPIM(idx)),		       \
+		.wake_gpiote = WAKE_GPIOTE_INSTANCE(DT_DRV_INST(inst)),	       \
 		IF_ENABLED(SPIM_ANY_FAST,				       \
 			(.clk_dev = DEVICE_DT_GET_OR_NULL(		       \
-				DT_CLOCKS_CTLR(SPIM(idx))),		       \
+				DT_CLOCKS_CTLR(DT_DRV_INST(inst))),	       \
 			 .clk_spec = {					       \
 				.frequency = NRF_CLOCK_CONTROL_FREQUENCY_MAX,  \
 			 },))						       \
-		IF_ENABLED(SPIM_PINS_CROSS_DOMAIN(_, /*empty*/, idx, _),       \
+		IF_ENABLED(SPIM_PINS_CROSS_DOMAIN(inst),		       \
 			(.cross_domain = true,				       \
 			 .default_port =				       \
-				DT_PROP_OR(DT_PHANDLE(SPIM(idx),	       \
+				DT_PROP_OR(DT_INST_PHANDLE(inst,	       \
 					default_gpio_port), port, -1),))       \
-		.mem_reg = DMM_DEV_TO_REG(SPIM(idx)),			       \
+		.mem_reg = DMM_DEV_TO_REG(DT_DRV_INST(inst)),		       \
 	};								       \
-	BUILD_ASSERT(!SPIM_HAS_PROP(idx, wake_gpios) ||			       \
-		     !(DT_GPIO_FLAGS(SPIM(idx), wake_gpios) & GPIO_ACTIVE_LOW),\
+	BUILD_ASSERT(!DT_INST_NODE_HAS_PROP(inst, wake_gpios) ||	       \
+		     !(DT_GPIO_FLAGS(DT_DRV_INST(inst), wake_gpios) &	       \
+		     GPIO_ACTIVE_LOW),					       \
 		     "WAKE line must be configured as active high");	       \
-	PM_DEVICE_DT_DEFINE(SPIM(idx), spim_nrfx_pm_action);		       \
-	SPI_DEVICE_DT_DEINIT_DEFINE(SPIM(idx),				       \
+	PM_DEVICE_DT_INST_DEFINE(inst, spim_nrfx_pm_action);		       \
+	SPI_DEVICE_DT_INST_DEINIT_DEFINE(inst,				       \
 		      spi_nrfx_init,					       \
 		      spi_nrfx_deinit,					       \
-		      PM_DEVICE_DT_GET(SPIM(idx)),			       \
-		      &spi_##idx##_data,				       \
-		      &spi_##idx##z_config,				       \
-		      POST_KERNEL, SPIM_INIT_PRIORITY(idx),		       \
+		      PM_DEVICE_DT_INST_GET(inst),			       \
+		      &spi_##inst##_data,				       \
+		      &spi_##inst##z_config,				       \
+		      POST_KERNEL, SPIM_INIT_PRIORITY(inst),		       \
 		      &spi_nrfx_driver_api)
 
-#define COND_NRF_SPIM_DEVICE(unused, prefix, i, _) \
-	IF_ENABLED(CONFIG_HAS_HW_NRF_SPIM##prefix##i, (SPI_NRFX_SPIM_DEFINE(prefix##i);))
-
-SPIM_FOR_EACH_INSTANCE(COND_NRF_SPIM_DEVICE, (), (), _)
+DT_INST_FOREACH_STATUS_OKAY(SPI_NRFX_SPIM_DEFINE)