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soc: arm: nxp_s32: s32k1: include cmsis headers
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Following changes in zephyrproject-rtos#64978, align CPU_HAS_xCACHE symbols with
the CMSIS feature definitions in the device headers so that
both have the same value.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
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manuargue committed Dec 5, 2023
1 parent 3d3b287 commit 49b9152
Showing 1 changed file with 0 additions and 12 deletions.
12 changes: 0 additions & 12 deletions soc/arm/nxp_s32/s32k1/Kconfig.soc
Original file line number Diff line number Diff line change
Expand Up @@ -20,48 +20,36 @@ config SOC_S32K142
select CPU_CORTEX_M4
select CPU_CORTEX_M_HAS_DWT
select CPU_HAS_FPU
select CPU_HAS_DCACHE
select CPU_HAS_ICACHE

config SOC_S32K142W
bool "S32K142W"
select CPU_CORTEX_M4
select CPU_CORTEX_M_HAS_DWT
select CPU_HAS_FPU
select CPU_HAS_DCACHE
select CPU_HAS_ICACHE

config SOC_S32K144
bool "S32K144"
select CPU_CORTEX_M4
select CPU_CORTEX_M_HAS_DWT
select CPU_HAS_FPU
select CPU_HAS_DCACHE
select CPU_HAS_ICACHE

config SOC_S32K144W
bool "S32K144W"
select CPU_CORTEX_M4
select CPU_CORTEX_M_HAS_DWT
select CPU_HAS_FPU
select CPU_HAS_DCACHE
select CPU_HAS_ICACHE

config SOC_S32K146
bool "S32K146"
select CPU_CORTEX_M4
select CPU_CORTEX_M_HAS_DWT
select CPU_HAS_FPU
select CPU_HAS_DCACHE
select CPU_HAS_ICACHE

config SOC_S32K148
bool "S32K148"
select CPU_CORTEX_M4
select CPU_CORTEX_M_HAS_DWT
select CPU_HAS_FPU
select CPU_HAS_DCACHE
select CPU_HAS_ICACHE

endchoice

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