Updates MWD_COARSE to run multiple patterns

Change-Id: I796af0ac1b02ceafe4c637136068dad920acd17b
Original-Change-Id: Idc5ea0ddbc7d19ff79d0f802ba966f05bdcc18c3
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/69848
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com>
Reviewed-by: Louis Stermole <stermole@us.ibm.com>
Reviewed-by: ANDRE A. MARIN <aamarin@us.ibm.com>
Tested-by: HWSV CI <hwsv-ci+hostboot@us.ibm.com>
Tested-by: PPE CI <ppe-ci+hostboot@us.ibm.com>
Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com>
Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com>
Reviewed-on: http://rchgit01.rchland.ibm.com/gerrit1/104158
Reviewed-by: STEPHEN GLANCY <sglancy@us.ibm.com>
Reviewed-by: Daniel M Crowell <dcrowell@us.ibm.com>
Tested-by: Daniel M Crowell <dcrowell@us.ibm.com>

Author: sglancy6

src/import/chips/p9/procedures/hwp/memory/lib/phy/mss_mrd_coarse.C

@@ -64,7 +64,7 @@ namespace lrdimm
 /// @param[in] i_target - the MCA target on which to operate
 /// @param[in] i_rp - the rank pair
 /// @param[in] i_abort_on_error - whether or not we are aborting on cal error
-/// @return fapi2::ReturnCode fapi2::FAPI2_RC_SUCCESS iff ok
+/// @return FAPI2_RC_SUCCESS iff ok
 ///
 fapi2::ReturnCode mrd_coarse::pre_workaround( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
         const uint64_t i_rp,
@@ -86,7 +86,7 @@ fapi_try_exit:
 /// @param[in] i_target - the MCA target on which to operate
 /// @param[in] i_rp - the rank pair
 /// @param[in] i_abort_on_error - whether or not we are aborting on cal error
-/// @return fapi2::ReturnCode fapi2::FAPI2_RC_SUCCESS if ok
+/// @return FAPI2_RC_SUCCESS if ok
 ///
 fapi2::ReturnCode mrd_coarse::post_workaround( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
         const uint64_t i_rp,
@@ -105,7 +105,7 @@ fapi_try_exit:
 /// @param[in] i_target the DIMM target
 /// @param[in] i_rank the DIMM rank on which to set the delay
 /// @param[in] i_delay the indexed delay to set
-/// @return fapi2::ReturnCode fapi2::FAPI2_RC_SUCCESS iff ok
+/// @return FAPI2_RC_SUCCESS iff ok
 /// @note Sets up buffer control word F6BC4x to do compares on a per-bit level
 ///
 fapi2::ReturnCode mrd_coarse::set_delay(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
@@ -167,7 +167,7 @@ fapi_try_exit:
 /// @param[in] i_dimm_rank the DIMM rank on which to set the delay
 /// @param[in] i_delay the delay for this run
 /// @param[in,out] io_results the results
-/// @return fapi2::ReturnCode fapi2::FAPI2_RC_SUCCESS iff ok
+/// @return FAPI2_RC_SUCCESS iff ok
 ///
 fapi2::ReturnCode mrd_coarse::analyze_results(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
         const uint64_t i_dimm_rank,
@@ -186,7 +186,7 @@ fapi2::ReturnCode mrd_coarse::analyze_results(const fapi2::Target<fapi2::TARGET_
     // Displays all of the data here - just.in.case.
     for(uint8_t l_buffer_loop = 0; l_buffer_loop < MAX_LRDIMM_BUFFERS; ++l_buffer_loop)
     {
-        for(uint8_t i = 0; i < 8; ++i)
+        for(uint8_t i = 0; i < data_response::MAX_NUM_BEATS; ++i)
         {
             FAPI_DBG("%s delay:0x%02x MRD_COARSE result buffer%u BEAT%u data:0x%02x",
                      mss::c_str(i_target), i_delay, l_buffer_loop, i, l_data.iv_buffer_beat[l_buffer_loop][i]);
@@ -374,7 +374,7 @@ fapi_try_exit:
 /// @param[in] i_target the MCA target
 /// @param[in] i_dimm_rank the DIMM rank on which to set the delay
 /// @param[in,out] io_results the results
-/// @return fapi2::ReturnCode fapi2::FAPI2_RC_SUCCESS iff ok
+/// @return FAPI2_RC_SUCCESS iff ok
 ///
 fapi2::ReturnCode mrd_coarse::find_final_results(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
         const uint64_t i_dimm_rank,
@@ -399,7 +399,7 @@ fapi_try_exit:
 /// @param[in] i_dimm_rank the DIMM rank on which to set the delay
 /// @param[in] i_results the results
 /// @param[out] o_container the PBA commands structure
-/// @return fapi2::ReturnCode fapi2::FAPI2_RC_SUCCESS iff ok
+/// @return FAPI2_RC_SUCCESS iff ok
 ///
 fapi2::ReturnCode mrd_coarse::set_final_delays_helper(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
         const uint64_t i_dimm_rank,
@@ -431,7 +431,7 @@ fapi2::ReturnCode mrd_coarse::set_final_delays_helper(const fapi2::Target<fapi2:
                              l_result.first.iv_final_delay :
                              l_result.second.iv_final_delay;
 
-        FAPI_DBG("%s MRD coarse rank%u buffer:%u final values (0x%02x,0x%02x) %s swapped nibble0:0x%02x nibble1:0x%02x",
+        FAPI_DBG("%s MRD_COARSE rank%u buffer:%u final values (0x%02x,0x%02x) %s swapped nibble0:0x%02x nibble1:0x%02x",
                  mss::c_str(l_mca), i_dimm_rank, l_buffer, l_result.first.iv_final_delay, l_result.second.iv_final_delay,
                  l_are_nibbles_swapped ? "are" : "not", l_bcw_result0, l_bcw_result1);
 
@@ -462,7 +462,7 @@ fapi_try_exit:
 /// @param[in] i_target the DIMM target
 /// @param[in] i_dimm_rank the DIMM rank on which to set the delay
 /// @param[in] i_results the results
-/// @return fapi2::ReturnCode fapi2::FAPI2_RC_SUCCESS iff ok
+/// @return FAPI2_RC_SUCCESS iff ok
 ///
 fapi2::ReturnCode mrd_coarse::set_final_delays(const fapi2::Target<fapi2::TARGET_TYPE_DIMM>& i_target,
         const uint64_t i_dimm_rank,
@@ -491,15 +491,22 @@ fapi_try_exit:
 /// @param[in] i_target - the MCA target on which to operate
 /// @param[in] i_rp - the rank pair
 /// @param[in] i_abort_on_error - whether or not we are aborting on cal error
-/// @return fapi2::ReturnCode fapi2::FAPI2_RC_SUCCESS iff ok
+/// @return FAPI2_RC_SUCCESS iff ok
 ///
 fapi2::ReturnCode mrd_coarse::run( const fapi2::Target<fapi2::TARGET_TYPE_MCA>& i_target,
                                    const uint64_t i_rp,
                                    const uint8_t i_abort_on_error ) const
 {
     constexpr uint8_t MPR_LOCATION0 = 0;
     std::vector<uint64_t> l_ranks;
+
+    // Use 0x2b for the pattern
+    // This pattern was determined experimentally, but has the following good qualities
+    // 1) it is not cyclic
+    // 2) it has all transitions (00, 01, 10, 11), making for a good SI test pattern
     constexpr uint8_t l_pattern_expected = 0x2B;
+    // We write to all of the MPR registers, so we clone the 2B pattern four times
+    // The patterns get split and written individually
     constexpr uint32_t l_pattern_set = 0x2B2B2B2B;
 
     // 1) Get our ranks within the configured rank pair

src/import/chips/p9/procedures/hwp/memory/lib/phy/mss_mrd_coarse.H

@@ -59,6 +59,11 @@ class mrd_coarse : public step
         // From the LRDIMM spec - we only have 5 delays -2->+2
         static constexpr uint64_t NUM_DELAYS = 5;
 
+        // Default delay value 2 is for 0 nck
+        static constexpr uint8_t DEFAULT_DELAYS = 2;
+        static constexpr uint8_t DEFAULT_TO_FAIL = 0;
+        static constexpr uint64_t RANKS_PER_FUNCTION_SPACE = 2;
+
         mrd_coarse() :
             step("MRD_COARSE")
         {}
@@ -80,15 +85,18 @@ class mrd_coarse : public step
             /// @brief Default constructor
             ///
             recorder() :
-                iv_results(0),
-                iv_final_delay(2), // 2 is for 0 delay
+                iv_results(DEFAULT_TO_FAIL),
+                iv_final_delay(DEFAULT_DELAYS), // 2 is for 0 delay
                 iv_invalid_data_count(CLEAN)
             {}
 
             ///
             /// @brief constructor
+            /// @param[in] i_results results from the MRD_COARSE run
+            /// @param[in] i_final_delay final delay chosen by the MRD_COARSE run
+            /// @param[in] i_invalid_count number of invalid data results seen
             ///
-            recorder(const fapi2::buffer<uint8_t> i_results, const uint8_t i_final_delay, const uint64_t i_invalid_count = CLEAN) :
+            recorder(const fapi2::buffer<uint8_t>& i_results, const uint8_t i_final_delay, const uint64_t i_invalid_count = CLEAN) :
                 iv_results(i_results),
                 iv_final_delay(i_final_delay),
                 iv_invalid_data_count(i_invalid_count)
@@ -210,7 +218,7 @@ class mrd_coarse : public step
             // So, odd ranks are on function space 0
             // Even ranks are on function space 1
             // Just mod it by 2...
-            return (i_dimm_rank % 2) ? FUNC_SPACE_1 : FUNC_SPACE_0;
+            return (i_dimm_rank % RANKS_PER_FUNCTION_SPACE) ? FUNC_SPACE_1 : FUNC_SPACE_0;
         }
 
         ///
@@ -224,7 +232,9 @@ class mrd_coarse : public step
             // Taken from the spec ~page 60->64
             // Ranks 0/1: 0x0c
             // Ranks 2/3: 0x0e
-            return (i_dimm_rank < 2) ? 0x0c : 0x0e;
+            constexpr uint8_t RANK01 = 0x0c;
+            constexpr uint8_t RANK23 = 0x0e;
+            return (i_dimm_rank < RANKS_PER_FUNCTION_SPACE) ? RANK01 : RANK23;
         }
 
         ///

src/import/chips/p9/procedures/hwp/memory/lib/phy/mss_mwd_coarse.C

@@ -6,6 +6,7 @@
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
 /* Contributors Listed Below - COPYRIGHT 2018,2020                        */
+/* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
 /* Licensed under the Apache License, Version 2.0 (the "License");        */
@@ -476,13 +477,16 @@ fapi2::ReturnCode mwd_coarse::run( const fapi2::Target<fapi2::TARGET_TYPE_MCA>&
                                    const uint8_t i_abort_on_error ) const
 {
     std::vector<uint64_t> l_ranks;
-    constexpr uint8_t l_pattern = 0x2B;
+    uint8_t l_patterns[NUM_LRDIMM_TRAINING_PATTERNS] = {};
 
     // Get ranks
     FAPI_TRY(mss::rank::get_ranks_in_pair( i_target, i_rp, l_ranks),
-             "Failed get_ranks_in_pair in mwd::run %s",
+             "Failed get_ranks_in_pair in mwd_coarse::run %s",
              mss::c_str(i_target));
 
+    // Gets the patterns to use
+    FAPI_TRY(mss::lrdimm_training_pattern(mss::find_target<fapi2::TARGET_TYPE_MCS>(i_target), l_patterns));
+
     // Loop through all ranks
     for(const auto l_rank : l_ranks)
     {
@@ -510,39 +514,44 @@ fapi2::ReturnCode mwd_coarse::run( const fapi2::Target<fapi2::TARGET_TYPE_MCA>&
         FAPI_TRY(mss::rank::get_dimm_target_from_rank(i_target, l_rank, l_dimm),
                  "%s failed to get DIMM from rank%u", mss::c_str(i_target), l_dimm_rank);
 
-        // 1) Setup data pattern in the buffer MPR regs
-        FAPI_TRY(lrdimm::set_expected_mpr_pattern(l_dimm, l_pattern), "%s failed set_expect_mpr_pattern rank%u, pattern%u",
-                 mss::c_str(l_dimm), l_dimm_rank, l_pattern);
-
         // Setup per-lane compare for MWD
-        // 2) Configure the compare output on a per-bit level (each bit returns 0/1, rather than each nibble)
+        // 1) Configure the compare output on a per-bit level (each bit returns 0/1, rather than each nibble)
         FAPI_TRY(lrdimm::set_training_level(l_dimm, lrdimm::training_level::BIT), "%s failed set_per_lane_level rank %u",
                  mss::c_str(l_dimm), l_dimm_rank);
 
-        // 3) Buffer into MWD mode
+        // 2) Buffer into MWD mode
         FAPI_TRY(set_buffer_training(l_dimm, ddr4::MWD), "%s failed set_buffer_training rank%u", mss::c_str(l_dimm),
                  l_dimm_rank);
 
         // For all delays
         for(uint8_t l_delay = 0; l_delay < NUM_DELAYS; ++l_delay)
         {
             // Set delay (broadcast across rank)
-            // 4) Setup our delays across the buffer
+            // 3) Setup our delays across the buffer
             FAPI_TRY(set_delay(l_dimm, l_dimm_rank, l_delay), "%s rank%u failed set_delay delay:%u", mss::c_str(l_dimm),
                      l_dimm_rank, l_delay);
 
-            // Conduct a WR/RD
-            // Write sends data from the buffer MPR
-            // 5) Read reads back what was written and does a bitwise compare
-            FAPI_TRY(conduct_write_read(l_dimm, l_dimm_rank), "%s rank%u failed conduct_write_read", mss::c_str(l_dimm),
-                     l_dimm_rank);
-
-            // 6) Conduct an NTTM mode read
-            FAPI_TRY(execute_nttm_mode_read(i_target), "%s rank%u failed execute_nttm_mode_read", mss::c_str(l_dimm), l_dimm_rank);
-
-            // 7) Analyze results
-            FAPI_TRY(analyze_results(l_dimm, l_dimm_rank, l_delay, l_results), "%s rank%u failed process_results",
-                     mss::c_str(i_target), l_dimm_rank);
+            // Loop over all patterns
+            for(uint8_t l_pattern_num = 0; l_pattern_num < NUM_LRDIMM_TRAINING_PATTERNS; ++l_pattern_num)
+            {
+                // 4) Setup data pattern in the buffer MPR regs
+                FAPI_TRY(lrdimm::set_expected_mpr_pattern(l_dimm, l_patterns[l_pattern_num]),
+                         "%s failed set_expect_mpr_pattern rank%u, pattern%u",
+                         mss::c_str(l_dimm), l_dimm_rank, l_patterns[l_pattern_num]);
+
+                // Conduct a WR/RD
+                // Write sends data from the buffer MPR
+                // 5) Read reads back what was written and does a bitwise compare
+                FAPI_TRY(conduct_write_read(l_dimm, l_dimm_rank), "%s rank%u failed conduct_write_read", mss::c_str(l_dimm),
+                         l_dimm_rank);
+
+                // 6) Conduct an NTTM mode read
+                FAPI_TRY(execute_nttm_mode_read(i_target), "%s rank%u failed execute_nttm_mode_read", mss::c_str(l_dimm), l_dimm_rank);
+
+                // 7) Analyze results
+                FAPI_TRY(analyze_results(l_dimm, l_dimm_rank, l_delay, l_results), "%s rank%u failed process_results",
+                         mss::c_str(i_target), l_dimm_rank);
+            }
         }
 
         // 8) Buffer out of training mode

src/import/chips/p9/procedures/hwp/memory/lib/phy/mss_mwd_coarse.H

@@ -6,6 +6,7 @@
 /* OpenPOWER HostBoot Project                                             */
 /*                                                                        */
 /* Contributors Listed Below - COPYRIGHT 2018,2020                        */
+/* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
 /* Licensed under the Apache License, Version 2.0 (the "License");        */
@@ -60,6 +61,9 @@ class mwd_coarse : public step
 
         // Default delay value 2 is for 0 nck
         static constexpr uint8_t DEFAULT_DELAYS = 2;
+        static constexpr uint8_t DEFAULT_TO_PASS = 0xF8;
+        static constexpr uint8_t PASSING_RESULT = 0x0f;
+        static constexpr uint8_t FAILING_RESULT = 0x00;
 
         mwd_coarse() :
             step("MWD_COARSE")
@@ -68,7 +72,9 @@ class mwd_coarse : public step
         ///
         /// @brief Default virtual destructor
         ///
-        ~mwd_coarse() = default;        ///
+        ~mwd_coarse() = default;
+
+        ///
         /// @class mwd_coarse::recorder
         /// @brief Records the results for a given nibble
         ///
@@ -78,9 +84,15 @@ class mwd_coarse : public step
             /// @brief Default constructor
             ///
             recorder() :
-                iv_results(0),
+                iv_results(DEFAULT_TO_PASS),
                 iv_final_delay(DEFAULT_DELAYS)
             {}
+
+            ///
+            /// @brief constructor
+            /// @param[in] i_results results from the MRD_COARSE run
+            /// @param[in] i_final final delay chosen by the MRD_COARSE run
+            ///
             recorder(fapi2::buffer<uint8_t> i_result, uint8_t i_delay)
             {
                 this->iv_results = i_result;
@@ -105,15 +117,15 @@ class mwd_coarse : public step
                 bool l_passed = false;
 
                 // 0 is not passed
-                if(i_result == 0x00)
+                if(i_result == FAILING_RESULT)
                 {
                     l_passed = false;
                 }
 
-                // F is passed
-                else if(i_result == 0x0f)
+                // F is passed - only if we had already passed at this location
+                else if(i_result == PASSING_RESULT)
                 {
-                    l_passed = true;
+                    l_passed = iv_results.getBit(i_delay);
                 }
 
                 // Anything else is an error case just call it not passed for now