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rjknightcrgeddes
rjknight
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crgeddes
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Invalid FFDC in error log
 Parsed FFDC showed what appeared to be scom addresses and function addresses instead of register contents. -Update ffdc routine to use local var to work around issue with calling function in ffdc capture object. Change-Id: I13f8604ce7597f7c2e2d323dfa7cc1e288cc7dc2 CQ:SW411912 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52692 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins Server <pfd-jenkins+hostboot@us.ibm.com> Tested-by: Hostboot CI <hostboot-ci+hostboot@us.ibm.com> Reviewed-by: Jennifer A. Stofer <stofer@us.ibm.com> Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/52697 Tested-by: Jenkins OP Build CI <op-jenkins+hostboot@us.ibm.com> Tested-by: Jenkins OP HW <op-hw-jenkins+hostboot@us.ibm.com> Reviewed-by: Christian R. Geddes <crgeddes@us.ibm.com>
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-89
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2 files changed

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‎src/import/chips/p9/procedures/hwp/io/p9_io_dmi_linktrain.C

Lines changed: 122 additions & 42 deletions
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@
55
/* */
66
/* OpenPOWER HostBoot Project */
77
/* */
8-
/* Contributors Listed Below - COPYRIGHT 2015,2017 */
8+
/* Contributors Listed Below - COPYRIGHT 2015,2018 */
99
/* [+] International Business Machines Corp. */
1010
/* */
1111
/* */
@@ -133,7 +133,9 @@ fapi2::ReturnCode add_linktrain_ffdc(
133133
// Master Common
134134
///////////////////////////////////////////////////////////////////////////
135135
l_rc = io::read(EDIP_RX_CTL_CNTL1_E_PG, i_mtgt, GRP3, LN0, l_data);
136-
ffdc.set_M_WDERF_START (io::get(EDIP_RX_START_WDERF_ALIAS, l_data));
136+
137+
uint64_t m_wderf_start = io::get(EDIP_RX_START_WDERF_ALIAS, l_data);
138+
ffdc.set_M_WDERF_START (m_wderf_start);
137139

138140
if(l_rc != fapi2::FAPI2_RC_SUCCESS)
139141
{
@@ -142,8 +144,12 @@ fapi2::ReturnCode add_linktrain_ffdc(
142144
}
143145

144146
l_rc = io::read(EDIP_RX_CTL_STAT1_E_PG, i_mtgt, GRP3, LN0, l_data);
145-
ffdc.set_M_WDERF_DONE (io::get(EDIP_RX_WDERF_DONE_ALIAS, l_data));
146-
ffdc.set_M_WDERF_FAILED(io::get(EDIP_RX_WDERF_FAILED_ALIAS, l_data));
147+
148+
uint64_t m_wderf_done = io::get(EDIP_RX_WDERF_DONE_ALIAS, l_data);
149+
ffdc.set_M_WDERF_DONE (m_wderf_done);
150+
151+
uint64_t m_wderf_failed = io::get(EDIP_RX_WDERF_FAILED_ALIAS, l_data);
152+
ffdc.set_M_WDERF_FAILED(m_wderf_failed);
147153

148154
if(l_rc != fapi2::FAPI2_RC_SUCCESS)
149155
{
@@ -153,17 +159,20 @@ fapi2::ReturnCode add_linktrain_ffdc(
153159
}
154160

155161
l_rc = io::read(EDIP_RX_CTL_STAT2_E_PG, i_mtgt, GRP3, LN0, l_data);
156-
ffdc.set_M_LANE_BAD_0_15(io::get(EDIP_RX_LANE_BAD_VEC_0_15, l_data));
162+
163+
uint64_t m_lane_bad_0_15 = io::get(EDIP_RX_LANE_BAD_VEC_0_15, l_data);
164+
ffdc.set_M_LANE_BAD_0_15(m_lane_bad_0_15);
157165

158166
if(l_rc != fapi2::FAPI2_RC_SUCCESS)
159167
{
160168
ffdc.set_M_LANE_BAD_0_15(INVALID_FFDC);
161169
l_rc = fapi2::FAPI2_RC_SUCCESS;
162170
}
163171

164-
165172
l_rc = io::read(EDIP_RX_CTL_STAT4_E_PG, i_mtgt, GRP3, LN0, l_data);
166-
ffdc.set_M_LANE_BAD_16_23(io::get(EDIP_RX_LANE_BAD_VEC_16_23, l_data));
173+
174+
uint64_t m_lane_bad_16_23 = io::get(EDIP_RX_LANE_BAD_VEC_16_23, l_data);
175+
ffdc.set_M_LANE_BAD_16_23(m_lane_bad_16_23);
167176

168177
if(l_rc != fapi2::FAPI2_RC_SUCCESS)
169178
{
@@ -172,7 +181,9 @@ fapi2::ReturnCode add_linktrain_ffdc(
172181
}
173182

174183
l_rc = io::read(EDIP_RX_CTL_MODE11_E_PG, i_mtgt, GRP3, LN0, l_data);
175-
ffdc.set_M_LANE_DISABLED_VEC_0_15(io::get(EDIP_RX_LANE_DISABLED_VEC_0_15, l_data));
184+
185+
uint64_t m_lane_disabled_0_15 = io::get(EDIP_RX_LANE_DISABLED_VEC_0_15, l_data);
186+
ffdc.set_M_LANE_DISABLED_VEC_0_15(m_lane_disabled_0_15);
176187

177188
if(l_rc != fapi2::FAPI2_RC_SUCCESS)
178189
{
@@ -181,7 +192,9 @@ fapi2::ReturnCode add_linktrain_ffdc(
181192
}
182193

183194
l_rc = io::read(EDIP_RX_CTL_MODE12_E_PG, i_mtgt, GRP3, LN0, l_data);
184-
ffdc.set_M_LANE_DISABLED_VEC_16_23(io::get(EDIP_RX_LANE_DISABLED_VEC_16_23, l_data));
195+
196+
uint64_t m_lane_disabled_16_23 = io::get(EDIP_RX_LANE_DISABLED_VEC_16_23, l_data);
197+
ffdc.set_M_LANE_DISABLED_VEC_16_23(m_lane_disabled_16_23);
185198

186199
if(l_rc != fapi2::FAPI2_RC_SUCCESS)
187200
{
@@ -190,7 +203,9 @@ fapi2::ReturnCode add_linktrain_ffdc(
190203
}
191204

192205
l_rc = io::read(EDIP_RX_GLBSM_STAT1_E_PG, i_mtgt, GRP3, LN0, l_data);
193-
ffdc.set_M_MAIN_INIT_STATE(io::get(EDIP_RX_MAIN_INIT_STATE, l_data));
206+
207+
uint64_t m_main_init_state = io::get(EDIP_RX_MAIN_INIT_STATE, l_data);
208+
ffdc.set_M_MAIN_INIT_STATE(m_main_init_state);
194209

195210
if(l_rc != fapi2::FAPI2_RC_SUCCESS)
196211
{
@@ -202,8 +217,12 @@ fapi2::ReturnCode add_linktrain_ffdc(
202217
// Master Wiretest
203218
///////////////////////////////////////////////////////////////////////////
204219
l_rc = io::read(EDIP_RX_GLBSM_STAT1_E_PG, i_mtgt, GRP3, LN0, l_data);
205-
ffdc.set_M_WIRETEST_WTM_STATE(io::get(EDIP_RX_WTM_STATE, l_data));
206-
ffdc.set_M_WIRETEST_WTR_STATE(io::get(EDIP_RX_WTR_STATE, l_data));
220+
221+
uint64_t m_wiretest_wtm_state = io::get( EDIP_RX_WTM_STATE, l_data );
222+
ffdc.set_M_WIRETEST_WTM_STATE( m_wiretest_wtm_state );
223+
224+
uint64_t m_wiretest_wtr_state = io::get( EDIP_RX_WTR_STATE, l_data );
225+
ffdc.set_M_WIRETEST_WTR_STATE( m_wiretest_wtr_state );
207226

208227
if(l_rc != fapi2::FAPI2_RC_SUCCESS)
209228
{
@@ -213,7 +232,9 @@ fapi2::ReturnCode add_linktrain_ffdc(
213232
}
214233

215234
l_rc = io::read(EDIP_RX_CTL_STAT3_EO_PG, i_mtgt, GRP3, LN0, l_data);
216-
ffdc.set_M_WIRETEST_WTL_SM_STATUS(io::get(EDIP_RX_WTL_SM_STATUS, l_data));
235+
236+
uint64_t m_wiretest_wtl_sm_status = io::get(EDIP_RX_WTL_SM_STATUS, l_data);
237+
ffdc.set_M_WIRETEST_WTL_SM_STATUS(m_wiretest_wtl_sm_status);
217238

218239
if(l_rc != fapi2::FAPI2_RC_SUCCESS)
219240
{
@@ -222,7 +243,9 @@ fapi2::ReturnCode add_linktrain_ffdc(
222243
}
223244

224245
l_rc = io::read(EDIP_RX_GLBSM_STAT2_E_PG, i_mtgt, GRP3, LN0, l_data);
225-
ffdc.set_M_WTR_BAD_LANE_COUNT(io::get(EDIP_RX_WTR_BAD_LANE_COUNT, l_data));
246+
247+
uint64_t m_wtr_bad_lane_count = io::get(EDIP_RX_WTR_BAD_LANE_COUNT, l_data);
248+
ffdc.set_M_WTR_BAD_LANE_COUNT(m_wtr_bad_lane_count);
226249

227250
if(l_rc != fapi2::FAPI2_RC_SUCCESS)
228251
{
@@ -231,8 +254,12 @@ fapi2::ReturnCode add_linktrain_ffdc(
231254
}
232255

233256
l_rc = io::read(EDIP_RX_CTL_STAT5_E_PG, i_mtgt, GRP3, LN0, l_data);
234-
ffdc.set_M_CLK_LANE_BAD_CODE (io::get(EDIP_RX_WT_CLK_LANE_BAD_CODE, l_data));
235-
ffdc.set_M_WT_CLK_LANE_INVERTED(io::get(EDIP_RX_WT_CLK_LANE_INVERTED, l_data));
257+
258+
uint64_t m_clk_lane_bad_code = io::get(EDIP_RX_WT_CLK_LANE_BAD_CODE, l_data);
259+
ffdc.set_M_CLK_LANE_BAD_CODE (m_clk_lane_bad_code);
260+
261+
uint64_t m_wk_clk_lane_inverted = io::get(EDIP_RX_WT_CLK_LANE_INVERTED, l_data);
262+
ffdc.set_M_WT_CLK_LANE_INVERTED(m_wk_clk_lane_inverted);
236263

237264
if(l_rc != fapi2::FAPI2_RC_SUCCESS)
238265
{
@@ -249,7 +276,9 @@ fapi2::ReturnCode add_linktrain_ffdc(
249276
// Master Eye Optimization
250277
///////////////////////////////////////////////////////////////////////////
251278
l_rc = io::read(EDIP_RX_GLBSM_STAT1_EO_PG, i_mtgt, GRP3, LN0, l_data);
252-
ffdc.set_M_EYE_OPT_STATE(io::get(EDIP_RX_EYE_OPT_STATE, l_data));
279+
280+
uint64_t m_eye_obt_state = io::get(EDIP_RX_EYE_OPT_STATE, l_data);
281+
ffdc.set_M_EYE_OPT_STATE(m_eye_obt_state);
253282

254283
if(l_rc != fapi2::FAPI2_RC_SUCCESS)
255284
{
@@ -258,9 +287,15 @@ fapi2::ReturnCode add_linktrain_ffdc(
258287
}
259288

260289
l_rc = io::read(EDIP_RX_CTL_CNTL13_EO_PG, i_mtgt, GRP3, LN0, l_data);
261-
ffdc.set_M_HIST_MIN_EYE_WIDTH( io::get(EDIP_RX_HIST_MIN_EYE_WIDTH, l_data));
262-
ffdc.set_M_HIST_MIN_EYE_WIDTH_LANE( io::get(EDIP_RX_HIST_MIN_EYE_WIDTH_LANE, l_data));
263-
ffdc.set_M_HIST_MIN_EYE_WIDTH_VALID(io::get(EDIP_RX_HIST_MIN_EYE_WIDTH_VALID, l_data));
290+
291+
uint64_t m_hist_min_eye_witdh = io::get(EDIP_RX_HIST_MIN_EYE_WIDTH, l_data);
292+
ffdc.set_M_HIST_MIN_EYE_WIDTH(m_hist_min_eye_witdh);
293+
294+
uint64_t m_hist_min_eye_witdh_lane = io::get(EDIP_RX_HIST_MIN_EYE_WIDTH, l_data);
295+
ffdc.set_M_HIST_MIN_EYE_WIDTH_LANE(m_hist_min_eye_witdh_lane);
296+
297+
uint64_t m_hist_min_eye_width_valid = io::get(EDIP_RX_HIST_MIN_EYE_WIDTH, l_data);
298+
ffdc.set_M_HIST_MIN_EYE_WIDTH_VALID(m_hist_min_eye_width_valid);
264299

265300
if(l_rc != fapi2::FAPI2_RC_SUCCESS)
266301
{
@@ -274,7 +309,9 @@ fapi2::ReturnCode add_linktrain_ffdc(
274309
// Master Repair
275310
///////////////////////////////////////////////////////////////////////////
276311
l_rc = io::read(EDIP_RX_GLBSM_STAT4_E_PG, i_mtgt, GRP3, LN0, l_data);
277-
ffdc.set_M_RPR_STATE(io::get(EDIP_RX_RPR_STATE, l_data));
312+
313+
uint64_t m_rpr_state = io::get(EDIP_RX_RPR_STATE, l_data);
314+
ffdc.set_M_RPR_STATE(m_rpr_state);
278315

279316
if(l_rc != fapi2::FAPI2_RC_SUCCESS)
280317
{
@@ -283,9 +320,16 @@ fapi2::ReturnCode add_linktrain_ffdc(
283320
}
284321

285322
l_rc = io::read(EDIP_RX_GLBSM_STAT9_E_PG, i_mtgt, GRP3, LN0, l_data);
286-
ffdc.set_M_BAD_LANE1 (io::get(EDIP_RX_BAD_LANE1, l_data));
287-
ffdc.set_M_BAD_LANE2 (io::get(EDIP_RX_BAD_LANE2, l_data));
288-
ffdc.set_M_BAD_LANE_CODE(io::get(EDIP_RX_BAD_LANE_CODE, l_data));
323+
324+
uint64_t m_bad_lane1 = io::get(EDIP_RX_BAD_LANE1, l_data);
325+
ffdc.set_M_BAD_LANE1 (m_bad_lane1);
326+
327+
uint64_t m_bad_lane2 = io::get(EDIP_RX_BAD_LANE2, l_data);
328+
ffdc.set_M_BAD_LANE2 (m_bad_lane2);
329+
330+
uint64_t m_bad_lane_code = io::get(EDIP_RX_BAD_LANE_CODE, l_data);
331+
ffdc.set_M_BAD_LANE2(m_bad_lane_code);
332+
289333

290334
if(l_rc != fapi2::FAPI2_RC_SUCCESS)
291335
{
@@ -303,7 +347,9 @@ fapi2::ReturnCode add_linktrain_ffdc(
303347
// Slave Common
304348
///////////////////////////////////////////////////////////////////////////
305349
l_rc = io::read(EDI_RX_TRAINING_START_PG, i_stgt, GRP0, LN0, l_data);
306-
ffdc.set_S_WDERF_START (io::get(EDI_RX_START_WDERF_ALIAS, l_data));
350+
351+
uint64_t s_wderf_start = io::get(EDI_RX_START_WDERF_ALIAS, l_data);
352+
ffdc.set_S_WDERF_START (s_wderf_start);
307353

308354
if(l_rc != fapi2::FAPI2_RC_SUCCESS)
309355
{
@@ -312,8 +358,12 @@ fapi2::ReturnCode add_linktrain_ffdc(
312358
}
313359

314360
l_rc = io::read(EDI_RX_TRAINING_STATUS_PG, i_stgt, GRP0, LN0, l_data);
315-
ffdc.set_S_WDERF_DONE (io::get(EDI_RX_WDERF_DONE_ALIAS, l_data));
316-
ffdc.set_S_WDERF_FAILED(io::get(EDI_RX_WDERF_FAILED_ALIAS, l_data));
361+
362+
uint64_t s_wderf_done = io::get(EDI_RX_WDERF_DONE_ALIAS, l_data);
363+
ffdc.set_S_WDERF_DONE(s_wderf_done);
364+
365+
uint64_t s_wderf_failed = io::get(EDI_RX_WDERF_FAILED_ALIAS, l_data);
366+
ffdc.set_S_WDERF_FAILED(s_wderf_failed);
317367

318368
if(l_rc != fapi2::FAPI2_RC_SUCCESS)
319369
{
@@ -323,7 +373,9 @@ fapi2::ReturnCode add_linktrain_ffdc(
323373
}
324374

325375
l_rc = io::read(EDI_RX_LANE_BAD_VEC_0_15_PG, i_stgt, GRP0, LN0, l_data);
326-
ffdc.set_S_LANE_BAD_0_15(io::get(EDI_RX_LANE_BAD_VEC_0_15, l_data));
376+
377+
uint64_t s_lane_bad_0_15 = io::get(EDI_RX_LANE_BAD_VEC_0_15, l_data);
378+
ffdc.set_S_LANE_BAD_0_15(s_lane_bad_0_15);
327379

328380
if(l_rc != fapi2::FAPI2_RC_SUCCESS)
329381
{
@@ -333,7 +385,9 @@ fapi2::ReturnCode add_linktrain_ffdc(
333385

334386

335387
l_rc = io::read(EDI_RX_LANE_BAD_VEC_16_31_PG, i_stgt, GRP0, LN0, l_data);
336-
ffdc.set_S_LANE_BAD_16_23(io::get(EDI_RX_LANE_BAD_VEC_16_31, l_data));
388+
389+
uint64_t s_lane_bad_16_23 = io::get(EDI_RX_LANE_BAD_VEC_16_31, l_data);
390+
ffdc.set_S_LANE_BAD_16_23(s_lane_bad_16_23);
337391

338392
if(l_rc != fapi2::FAPI2_RC_SUCCESS)
339393
{
@@ -342,7 +396,9 @@ fapi2::ReturnCode add_linktrain_ffdc(
342396
}
343397

344398
l_rc = io::read(EDI_RX_LANE_DISABLED_VEC_0_15_PG, i_stgt, GRP0, LN0, l_data);
345-
ffdc.set_S_LANE_DISABLED_VEC_0_15(io::get(EDI_RX_LANE_DISABLED_VEC_0_15, l_data));
399+
400+
uint64_t s_lane_disabled_0_15 = io::get(EDI_RX_LANE_DISABLED_VEC_0_15, l_data);
401+
ffdc.set_S_LANE_DISABLED_VEC_0_15(s_lane_disabled_0_15);
346402

347403
if(l_rc != fapi2::FAPI2_RC_SUCCESS)
348404
{
@@ -351,7 +407,9 @@ fapi2::ReturnCode add_linktrain_ffdc(
351407
}
352408

353409
l_rc = io::read(EDI_RX_LANE_DISABLED_VEC_16_31_PG, i_stgt, GRP0, LN0, l_data);
354-
ffdc.set_S_LANE_DISABLED_VEC_16_23(io::get(EDI_RX_LANE_DISABLED_VEC_16_31, l_data));
410+
411+
uint64_t s_lane_disabled_16_23 = io::get(EDI_RX_LANE_DISABLED_VEC_16_31, l_data);
412+
ffdc.set_S_LANE_DISABLED_VEC_16_23(s_lane_disabled_16_23);
355413

356414
if(l_rc != fapi2::FAPI2_RC_SUCCESS)
357415
{
@@ -365,9 +423,15 @@ fapi2::ReturnCode add_linktrain_ffdc(
365423
// Slave Wiretest
366424
///////////////////////////////////////////////////////////////////////////
367425
l_rc = io::read(EDI_RX_WIRETEST_STATE_PG, i_stgt, GRP0, LN0, l_data);
368-
ffdc.set_S_WIRETEST_WTM_STATE(io::get(EDI_RX_WTM_STATE, l_data));
369-
ffdc.set_S_WIRETEST_WTR_STATE(io::get(EDI_RX_WTR_STATE, l_data));
370-
ffdc.set_S_WIRETEST_WTL_SM_STATUS(io::get(EDI_RX_WTL_STATE, l_data));
426+
427+
uint64_t s_wiretest_wtm_state = io::get(EDI_RX_WTM_STATE, l_data);
428+
ffdc.set_S_WIRETEST_WTM_STATE(s_wiretest_wtm_state);
429+
430+
uint64_t s_wiretest_wtr_state = io::get(EDI_RX_WTR_STATE, l_data);
431+
ffdc.set_S_WIRETEST_WTR_STATE(s_wiretest_wtr_state);
432+
433+
uint64_t s_wiretest_wtl_sm_statue = io::get(EDI_RX_WTL_STATE, l_data);
434+
ffdc.set_S_WIRETEST_WTL_SM_STATUS(s_wiretest_wtl_sm_statue);
371435

372436
if(l_rc != fapi2::FAPI2_RC_SUCCESS)
373437
{
@@ -378,7 +442,9 @@ fapi2::ReturnCode add_linktrain_ffdc(
378442
}
379443

380444
l_rc = io::read(EDI_RX_WIRETEST_LANEINFO_PG, i_stgt, GRP0, LN0, l_data);
381-
ffdc.set_S_WTR_BAD_LANE_COUNT(io::get(EDI_RX_WTR_BAD_LANE_COUNT, l_data));
445+
446+
uint64_t s_wtr_bad_lane_count = io::get(EDI_RX_WTR_BAD_LANE_COUNT, l_data);
447+
ffdc.set_S_WTR_BAD_LANE_COUNT(s_wtr_bad_lane_count);
382448

383449
if(l_rc != fapi2::FAPI2_RC_SUCCESS)
384450
{
@@ -387,8 +453,12 @@ fapi2::ReturnCode add_linktrain_ffdc(
387453
}
388454

389455
l_rc = io::read(EDI_RX_WT_CLK_STATUS_PG, i_stgt, GRP0, LN0, l_data);
390-
ffdc.set_S_CLK_LANE_BAD_CODE (io::get(EDI_RX_WT_CLK_LANE_BAD_CODE, l_data));
391-
ffdc.set_S_WT_CLK_LANE_INVERTED(io::get(EDI_RX_WT_CLK_LANE_INVERTED, l_data));
456+
457+
uint64_t s_clk_lane_bad_code = io::get(EDI_RX_WT_CLK_LANE_BAD_CODE, l_data);
458+
ffdc.set_S_CLK_LANE_BAD_CODE(s_clk_lane_bad_code);
459+
460+
uint64_t s_clk_lane_inverted = io::get(EDI_RX_WT_CLK_LANE_INVERTED, l_data);
461+
ffdc.set_S_WT_CLK_LANE_INVERTED(s_clk_lane_inverted);
392462

393463
if(l_rc != fapi2::FAPI2_RC_SUCCESS)
394464
{
@@ -405,7 +475,9 @@ fapi2::ReturnCode add_linktrain_ffdc(
405475
// Slave Eye Optimization
406476
///////////////////////////////////////////////////////////////////////////
407477
l_rc = io::read(EDI_RX_EO_RECAL_PG, i_stgt, GRP0, LN0, l_data);
408-
ffdc.set_S_EYE_OPT_STATE(io::get(EDI_RX_EYE_OPT_STATE, l_data));
478+
479+
uint64_t s_eye_opt_state = io::get(EDI_RX_EYE_OPT_STATE, l_data);
480+
ffdc.set_S_EYE_OPT_STATE(s_eye_opt_state);
409481

410482
if(l_rc != fapi2::FAPI2_RC_SUCCESS)
411483
{
@@ -421,7 +493,9 @@ fapi2::ReturnCode add_linktrain_ffdc(
421493
// Slave Repair
422494
///////////////////////////////////////////////////////////////////////////
423495
l_rc = io::read(EDI_RX_STATIC_REPAIR_STATE_PG, i_stgt, GRP0, LN0, l_data);
424-
ffdc.set_S_RPR_STATE(io::get(EDI_RX_RPR_STATE, l_data));
496+
497+
uint64_t s_rpr_state = io::get(EDI_RX_RPR_STATE, l_data);
498+
ffdc.set_S_RPR_STATE(s_rpr_state);
425499

426500
if(l_rc != fapi2::FAPI2_RC_SUCCESS)
427501
{
@@ -430,9 +504,15 @@ fapi2::ReturnCode add_linktrain_ffdc(
430504
}
431505

432506
l_rc = io::read(EDI_RX_BAD_LANE_ENC_GCRMSG_PG, i_stgt, GRP0, LN0, l_data);
433-
ffdc.set_S_BAD_LANE1 (io::get(EDI_RX_BAD_LANE1_GCRMSG, l_data));
434-
ffdc.set_S_BAD_LANE2 (io::get(EDI_RX_BAD_LANE2_GCRMSG, l_data));
435-
ffdc.set_S_BAD_LANE_CODE(io::get(EDI_RX_BAD_LANE_CODE_GCRMSG, l_data));
507+
508+
uint64_t s_bad_lane1 = io::get(EDI_RX_BAD_LANE1_GCRMSG, l_data);
509+
ffdc.set_S_BAD_LANE1 (s_bad_lane1);
510+
511+
uint64_t s_bad_lane2 = io::get(EDI_RX_BAD_LANE2_GCRMSG, l_data);
512+
ffdc.set_S_BAD_LANE2 (s_bad_lane2);
513+
514+
uint64_t s_bad_lane_code = io::get(EDI_RX_BAD_LANE_CODE_GCRMSG, l_data);
515+
ffdc.set_S_BAD_LANE_CODE(s_bad_lane_code);
436516

437517
if(l_rc != fapi2::FAPI2_RC_SUCCESS)
438518
{

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