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| 1 | +/* IBM_PROLOG_BEGIN_TAG */ |
| 2 | +/* This is an automatically generated prolog. */ |
| 3 | +/* */ |
| 4 | +/* $Source: src/import/chips/ocmb/explorer/procedures/hwp/memory/lib/ccs/ccs_explorer.C $ */ |
| 5 | +/* */ |
| 6 | +/* OpenPOWER HostBoot Project */ |
| 7 | +/* */ |
| 8 | +/* Contributors Listed Below - COPYRIGHT 2015,2019 */ |
| 9 | +/* [+] International Business Machines Corp. */ |
| 10 | +/* */ |
| 11 | +/* */ |
| 12 | +/* Licensed under the Apache License, Version 2.0 (the "License"); */ |
| 13 | +/* you may not use this file except in compliance with the License. */ |
| 14 | +/* You may obtain a copy of the License at */ |
| 15 | +/* */ |
| 16 | +/* http://www.apache.org/licenses/LICENSE-2.0 */ |
| 17 | +/* */ |
| 18 | +/* Unless required by applicable law or agreed to in writing, software */ |
| 19 | +/* distributed under the License is distributed on an "AS IS" BASIS, */ |
| 20 | +/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */ |
| 21 | +/* implied. See the License for the specific language governing */ |
| 22 | +/* permissions and limitations under the License. */ |
| 23 | +/* */ |
| 24 | +/* IBM_PROLOG_END_TAG */ |
| 25 | + |
| 26 | +/// |
| 27 | +/// @file ccs_explorer.C |
| 28 | +/// @brief Run and manage the CCS engine |
| 29 | +/// |
| 30 | +// *HWP HWP Owner: Matthew Hickman <Matthew.Hickman@ibm.com> |
| 31 | +// *HWP HWP Backup: Stephen Glancy <sglancy@us.ibm.com> |
| 32 | +// *HWP Team: Memory |
| 33 | +// *HWP Level: 3 |
| 34 | +// *HWP Consumed by: FSP:HB |
| 35 | + |
| 36 | +#include <fapi2.H> |
| 37 | + |
| 38 | +#include <lib/shared/exp_defaults.H> |
| 39 | +#include <lib/ccs/ccs_traits_explorer.H> |
| 40 | +#include <generic/memory/lib/ccs/ccs.H> |
| 41 | +#include <lib/ccs/ccs_explorer.H> |
| 42 | +#include <lib/utils/mss_exp_conversions.H> |
| 43 | + |
| 44 | +// Generates linkage |
| 45 | +constexpr std::pair<uint64_t, uint64_t> ccsTraits<mss::mc_type::EXPLORER>::CS_N[]; |
| 46 | +constexpr std::pair<uint64_t, uint64_t> ccsTraits<mss::mc_type::EXPLORER>::CS_ND[]; |
| 47 | + |
| 48 | +namespace mss |
| 49 | +{ |
| 50 | +namespace ccs |
| 51 | +{ |
| 52 | + |
| 53 | +/// |
| 54 | +/// @brief Cleans up from a CCS execution - multiple ports - EXPLORER specialization |
| 55 | +/// @param[in] i_program the vector of instructions |
| 56 | +/// @param[in] i_ports the vector of ports |
| 57 | +/// @return FAPI2_RC_SUCCSS iff ok |
| 58 | +/// |
| 59 | +template<> |
| 60 | +fapi2::ReturnCode cleanup_from_execute<fapi2::TARGET_TYPE_MEM_PORT, mss::mc_type::EXPLORER> |
| 61 | +(const ccs::program& i_program, |
| 62 | + const std::vector< fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT> >& i_ports) |
| 63 | +{ |
| 64 | + return fapi2::FAPI2_RC_SUCCESS; |
| 65 | +} |
| 66 | + |
| 67 | +/// |
| 68 | +/// @brief Determine the CCS failure type |
| 69 | +/// @param[in] i_target OCMB target |
| 70 | +/// @param[in] i_type the failure type |
| 71 | +/// @param[in] i_port The port the CCS instruction is training |
| 72 | +/// @return ReturnCode associated with the fail. |
| 73 | +/// @note FFDC is handled here, caller doesn't need to do it |
| 74 | +/// |
| 75 | +template<> |
| 76 | +fapi2::ReturnCode fail_type( const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, |
| 77 | + const uint64_t i_type, |
| 78 | + const fapi2::Target<fapi2::TARGET_TYPE_MEM_PORT>& i_port ) |
| 79 | +{ |
| 80 | + typedef ccsTraits<mss::mc_type::EXPLORER> TT; |
| 81 | + |
| 82 | + // Including the PORT_TARGET here and below at CAL_TIMEOUT since these problems likely lie at the MCA level |
| 83 | + // So we disable the PORT and hopefully that's it |
| 84 | + // If the problem lies with the MCBIST, it'll just have to loop |
| 85 | + FAPI_ASSERT(TT::STAT_READ_MISCOMPARE != i_type, |
| 86 | + fapi2::MSS_EXP_CCS_READ_MISCOMPARE() |
| 87 | + .set_MC_TARGET(i_target) |
| 88 | + .set_FAIL_TYPE(i_type) |
| 89 | + .set_PORT_TARGET(i_port), |
| 90 | + "%s CCS FAIL Read Miscompare", mss::c_str(i_port)); |
| 91 | + |
| 92 | + // This error is likely due to a bad CCS engine/ MCBIST |
| 93 | + FAPI_ASSERT(TT::STAT_UE_SUE != i_type, |
| 94 | + fapi2::MSS_EXP_CCS_UE_SUE() |
| 95 | + .set_FAIL_TYPE(i_type) |
| 96 | + .set_MC_TARGET(i_target), |
| 97 | + "%s CCS FAIL UE or SUE Error", mss::c_str(i_target)); |
| 98 | + |
| 99 | + // Problem with the CCS engine |
| 100 | + FAPI_ASSERT(TT::STAT_HUNG != i_type, |
| 101 | + fapi2::MSS_EXP_CCS_HUNG().set_MC_TARGET(i_target), |
| 102 | + "%s CCS appears hung", mss::c_str(i_target)); |
| 103 | +fapi_try_exit: |
| 104 | + // Due to the PRD update, we need to check for FIR's |
| 105 | + // If any FIR's have lit up, this CCS fail could have been caused by the FIR |
| 106 | + // So, let PRD retrigger this step to see if we can resolve the issue |
| 107 | + return mss::check::fir_or_pll_fail<mss::mc_type::EXPLORER>(i_target, fapi2::current_err); |
| 108 | +} |
| 109 | + |
| 110 | +/// |
| 111 | +/// @brief EXP specialization for modeq_copy_cke_to_spare_cke |
| 112 | +/// @param[in] fapi2::Target<TARGET_TYPE_OCMB_CHIP>& the target to effect |
| 113 | +/// @param[in,out] the buffer representing the mode register |
| 114 | +/// @param[in] mss::states - mss::ON iff Copy CKE signals to CKE Spare on both ports |
| 115 | +/// @note no-op for p9n |
| 116 | +/// |
| 117 | +template<> |
| 118 | +void copy_cke_to_spare_cke<fapi2::TARGET_TYPE_OCMB_CHIP>( const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>&, |
| 119 | + fapi2::buffer<uint64_t>&, states ) |
| 120 | +{ |
| 121 | + return; |
| 122 | +} |
| 123 | + |
| 124 | +/// |
| 125 | +/// @brief Updates the initial delays based upon the total delays passed in - EXP specialization |
| 126 | +/// @param[in] i_target the target type on which to operate |
| 127 | +/// @param[in] i_delay the calculated delays from CCS |
| 128 | +/// @param[in,out] io_program the program for which to update the delays |
| 129 | +/// @return FAPI2_RC_SUCCSS iff ok |
| 130 | +/// |
| 131 | +template<> |
| 132 | +fapi2::ReturnCode update_initial_delays<fapi2::TARGET_TYPE_OCMB_CHIP, mss::mc_type::EXPLORER> |
| 133 | +( const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, |
| 134 | + const uint64_t i_delay, |
| 135 | + ccs::program& io_program) |
| 136 | +{ |
| 137 | + // Check our program for any delays. If there isn't a iv_initial_delay configured, then |
| 138 | + // we use the delay we just summed from the instructions. |
| 139 | + if (io_program.iv_poll.iv_initial_delay == 0) |
| 140 | + { |
| 141 | + io_program.iv_poll.iv_initial_delay = cycles_to_ns(i_target, i_delay); |
| 142 | + } |
| 143 | + |
| 144 | + if (io_program.iv_poll.iv_initial_sim_delay == 0) |
| 145 | + { |
| 146 | + io_program.iv_poll.iv_initial_sim_delay = cycles_to_simcycles(i_delay); |
| 147 | + } |
| 148 | + |
| 149 | + return fapi2::FAPI2_RC_SUCCESS; |
| 150 | +} |
| 151 | + |
| 152 | +/// |
| 153 | +/// @brief Select the port(s) to be used by the CCS - EXPLORER specialization |
| 154 | +/// @param[in] i_target the target to effect |
| 155 | +/// @param[in] i_ports the buffer representing the ports |
| 156 | +/// |
| 157 | +template<> |
| 158 | +fapi2::ReturnCode select_ports<mss::mc_type::EXPLORER>( const fapi2::Target<fapi2::TARGET_TYPE_OCMB_CHIP>& i_target, |
| 159 | + uint64_t i_ports) |
| 160 | +{ |
| 161 | + // No broadcast mode, only one port, so no port selection |
| 162 | + return fapi2::FAPI2_RC_SUCCESS; |
| 163 | +} |
| 164 | + |
| 165 | +} // namespace ccs |
| 166 | +} // namespace mss |
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