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Create IDT Article #15

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RevolutionXenon
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Create idt.adoc and add reference to it in the appropriate place in nav.adoc

I will get to creating the sister GDT article soon.

@austanss
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Putting my two cents where they're worth it.

I believe that example code should not be present in any non-tutorial page, and articles that are not tutorials should only offer information in an encyclopedic tone and not provide functional code samples.

@RevolutionXenon
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Sure I'll change it

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Since a lot of changes to the repository have been made since this PR was submitted, a few changes to the PR are necessary.

The changes to nav.adoc are obsolete and files have been moved from modules/ROOT/pages to pages.

In addition, style guidelines have been instated recently. All commits messages must be adapted to comply with these.

In addition lines longer than 100 columns must be hard wrapped (I'd recommend 80 columns) and new sentences (after a full stop), must start on a new line.

Formatting issues aside, the content itself mostly lgtm.

Comment on lines +1 to +6
= Interrupt Descriptor Table
:description:
:keywords: interrupts, x86
:page-category: interrupts
:source-language: c
:table-caption!:
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Replace by header as described here: https://osdev.wiki/pages/writer_tutorial.html

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== Overview

The *Interrupt Descriptor Table* is a binary data structure specific to xref:x86.adoc[x86]'s 32-bit (IA-32) and 64-bit (x86-64) variants. It is used in xref:x86.adoc#_protected_mode_32_bit[*Protected Mode*] and xref:x86.adoc#_long_mode_x86_64_only[*Long Mode*] and a similar *Interrupt Vector Table* exists in xref:x86.adoc#_real_mode[*Real Mode*].
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I don't think it is necessary to boldface protected mode, long mode and real mode. In addition, the modes are lower case.

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The *IDT* is responsible for informing the CPU of the location and operation modes of *Interrupt Service Routines* corresponding to one of 256 *Interrupt Vectors*.

The *IDT* is similar to the xref:gdt.adoc[*Global Descriptor Table*] in structure and interfaces with it, making it important to have a working and complete *GDT* before it can be used.
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No need to boldface GDT.

Comment on lines +88 to +90
If the CPU was running in 32-bit mode and the specified selector enters 32-bit code, then the CPU will enter xref:x86.adoc#_protected_mode_32_bit[*32-bit Protected Mode*] after calling the *ISR*. To return in this case, the _IRET_ instruction should be used.

If the CPU was running in 32-bit mode and the specified selector enters 16-bit code, then the CPU will enter xref:x86.adoc#_protected_mode_16_bit[*16-bit Protected Mode*] after calling the *ISR*. To return in this case, the _O32 IRET_ instruction should be used, or else the CPU will not know that it should do a 32-bit return (reading 32-bit values off the stack instead of 16 bit).
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Do not link to the same page more than once. This article is not that long.


Each entry in the table has a complex structure:

*TODO DIAGRAM OR TABLE HERE*
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Comment out TODOs.


Each entry in the table has a complex structure:

*TODO DIAGRAM OR TABLE HERE*
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Comment out TODOs.

* *Gate Type:* A 4-bit value which defines the type of gate this **Interrupt Descriptor** represents. There are two valid type values:
** *0xE:* 64-bit Interrupt Gate.
** *0xF:* 64-bit Trap Gate.
* *DPL:* A 2-bit value which defines the *CPU Privilege Levels* which are allowed to access this interrupt via the _INT_ instruction. Hardware interrupts ignore this mechanism.
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CPU privilege level is lower case.


== Gate Types

There are at a basic level two kinds of interrupts: undesired interrupts or *Exceptions*, which occur when running code has encountered a CPU-level error, and desired interrupts such as hardware interrupts or the _INT_ instruction. In the first case it is pertinent to save the address of the _currently_ executing instruction so that it can be retried, this is called a *Trap*. In the second case it is pertinent to save the address of the _next_ instruction so that execution can be resumed where it left off. Another difference to note is that with *Traps*, new interrupts might occur during the service routine, but when the CPU is serving an *IRQ* or _INT_ call, further interrupts are masked until an *End of Interrupt* signal is sent. How a certain interrupt is served depends on which kind of gate you put in the corresponding *Interrupt Descriptor*.
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CPU exceptions are not always undesired.

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Statistically, most exceptions are desired since shit doesn't crash often but it sure does demand page often.

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4 participants