The goal of this project is to develop approximate arithmetic and comparison blocks, as well as workflows, to be applied in Decision Tree model construction and usage, focusing on low-power operation.
This repo contains files used in research developed in the Embedded Computing Lab at UFSC (ECL/UFSC), as part of programs in Scientific and Technological Innovation Initiation (PIBITI/CNPq 2020-2021). Currently being continued as a final project for a B.Sc. in Computer Science at UFSC.
Publications:
- P. A. Silva, M. Grellert and C. Meinhardt, "Exploring Approximate Comparator Circuits on Power Efficient Design of Decision Trees," 2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC), 2022, pp. 1-6, doi: 10.1109/VLSI-SoC54400.2022.9939599.
- P. Silva, M. Grellert and C. Meinhardt, "Approximation Workflow for Energy-Efficient Comparators in Decision Tree Applications," 2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC), 2022, pp. 1-2, doi: 10.1109/VLSI-SoC54400.2022.9939637.
- P. Silva, "Exploring Approximate Comparator Circuits in the Energy Efficient Design of Decision Trees". Undergraduate thesis, 2022.