Pinned Loading
-
4x8bit_DAC_ADC
4x8bit_DAC_ADC PublicForked from dineshannayya/8bit_dac
4 x 8 Bit DAC taget to openroad/openlane flow and sky130 foundary
Verilog
-
-
-
python_spice_optimizer
python_spice_optimizer PublicUsing NSGA2 algorithm to find optimim values for a RC filter using ngspice and pymoo
Jupyter Notebook
-
tinytapeout_pramit
tinytapeout_pramit Publicefabless tiny tapeout with wokwi BCD to 7-Segment
Verilog 1
-
Something went wrong, please refresh the page to try again.
If the problem persists, check the GitHub status page or contact support.
If the problem persists, check the GitHub status page or contact support.