hv: other: fix "Procedure has more than one exit point"

IEC 61508,ISO 26262 standards highly recommend single-exit rule.

Reduce the count of the "return entries".
Fix the violations which is comply with the cases list below:
1.Function has 2 return entries.
2.The first return entry is used to return the error code of
checking variable whether is valid.

Fix the violations in "if else" format.

Tracked-On: #861
Signed-off-by: Huihuang Shi <huihuang.shi@intel.com>
Acked-by: Eddie Dong <eddie.dong@intel.com>

Author: Shawnshh

hypervisor/arch/x86/notify.c

@@ -111,6 +111,5 @@ void setup_posted_intr_notification(void)
 			posted_intr_notification,
 			NULL, IRQF_NONE) < 0) {
 		pr_err("Failed to setup posted-intr notification");
-		return;
 	}
 }

hypervisor/arch/x86/pm.c

@@ -131,66 +131,66 @@ void enter_s3(struct acrn_vm *vm, uint32_t pm1a_cnt_val, uint32_t pm1b_cnt_val)
 
 	/* We assume enter s3 success by default */
 	host_enter_s3_success = 1U;
-	if (vm->pm.sx_state_data == NULL) {
-		pr_err("No Sx state info avaiable. No Sx support");
-		host_enter_s3_success = 0U;
-		return;
-	}
+	if (vm->pm.sx_state_data != NULL) {
+		pause_vm(vm);	/* pause vm0 before suspend system */
 
-	pause_vm(vm);	/* pause vm0 before suspend system */
+		pcpu_id = get_cpu_id();
 
-	pcpu_id = get_cpu_id();
+		/* Save the wakeup vec set by guest. Will return to guest
+		 * with this wakeup vec as entry.
+		 */
+		guest_wakeup_vec32 = *vm->pm.sx_state_data->wake_vector_32;
 
-	/* Save the wakeup vec set by guest. Will return to guest
-	 * with this wakeup vec as entry.
-	 */
-	guest_wakeup_vec32 = *vm->pm.sx_state_data->wake_vector_32;
+		/* set ACRN wakeup vec instead */
+		*vm->pm.sx_state_data->wake_vector_32 =
+			(uint32_t) trampoline_start16_paddr;
 
-	/* set ACRN wakeup vec instead */
-	*vm->pm.sx_state_data->wake_vector_32 =
-		(uint32_t) trampoline_start16_paddr;
+		/* offline all APs */
+		stop_cpus();
 
-	/* offline all APs */
-	stop_cpus();
+		/* Save default main entry and we will restore it after
+		 * back from S3. So the AP online could jmp to correct
+		 * main entry.
+		 */
+		pmain_entry_saved = read_trampoline_sym(main_entry);
 
-	/* Save default main entry and we will restore it after
-	 * back from S3. So the AP online could jmp to correct
-	 * main entry.
-	 */
-	pmain_entry_saved = read_trampoline_sym(main_entry);
+		/* Set the main entry for resume from S3 state */
+		write_trampoline_sym(main_entry, (uint64_t)restore_s3_context);
 
-	/* Set the main entry for resume from S3 state */
-	write_trampoline_sym(main_entry, (uint64_t)restore_s3_context);
+		CPU_IRQ_DISABLE();
+		vmx_off(pcpu_id);
 
-	CPU_IRQ_DISABLE();
-	vmx_off(pcpu_id);
+		suspend_console();
+		suspend_ioapic();
+		suspend_iommu();
+		suspend_lapic();
 
-	suspend_console();
-	suspend_ioapic();
-	suspend_iommu();
-	suspend_lapic();
+		asm_enter_s3(vm, pm1a_cnt_val, pm1b_cnt_val);
 
-	asm_enter_s3(vm, pm1a_cnt_val, pm1b_cnt_val);
+		/* release the lock aquired in trampoline code */
+		spinlock_release(&trampoline_spinlock);
 
-	/* release the lock aquired in trampoline code */
-	spinlock_release(&trampoline_spinlock);
+		resume_lapic();
+		resume_iommu();
+		resume_ioapic();
+		resume_console();
 
-	resume_lapic();
-	resume_iommu();
-	resume_ioapic();
-	resume_console();
+		exec_vmxon_instr(pcpu_id);
+		CPU_IRQ_ENABLE();
 
-	exec_vmxon_instr(pcpu_id);
-	CPU_IRQ_ENABLE();
+		/* restore the default main entry */
+		write_trampoline_sym(main_entry, pmain_entry_saved);
 
-	/* restore the default main entry */
-	write_trampoline_sym(main_entry, pmain_entry_saved);
+		/* online all APs again */
+		start_cpus();
 
-	/* online all APs again */
-	start_cpus();
+		/* jump back to vm */
+		resume_vm_from_s3(vm, guest_wakeup_vec32);
+	} else {
+		pr_err("No Sx state info avaiable. No Sx support");
+		host_enter_s3_success = 0U;
+	}
 
-	/* jump back to vm */
-	resume_vm_from_s3(vm, guest_wakeup_vec32);
 
 	return;
 }

hypervisor/arch/x86/trusty.c

@@ -134,23 +134,22 @@ void destroy_secure_world(struct acrn_vm *vm, bool need_clr_mem)
 	uint64_t gpa_uos = vm->sworld_control.sworld_memory.base_gpa_in_uos;
 	uint64_t size = vm->sworld_control.sworld_memory.length;
 
-	if (vm->arch_vm.sworld_eptp == NULL) {
-		pr_err("sworld eptp is NULL, it's not created");
-		return;
-	}
-
-	if (need_clr_mem) {
-		/* clear trusty memory space */
-		(void)memset(hpa2hva(hpa), 0U, (size_t)size);
-	}
+	if (vm->arch_vm.sworld_eptp != NULL) {
+		if (need_clr_mem) {
+			/* clear trusty memory space */
+			(void)memset(hpa2hva(hpa), 0U, (size_t)size);
+		}
 
-	ept_mr_del(vm, vm->arch_vm.sworld_eptp, gpa_uos, size);
-	/* sanitize trusty ept page-structures */
-	sanitize_pte((uint64_t *)vm->arch_vm.sworld_eptp);
-	vm->arch_vm.sworld_eptp = NULL;
+		ept_mr_del(vm, vm->arch_vm.sworld_eptp, gpa_uos, size);
+		/* sanitize trusty ept page-structures */
+		sanitize_pte((uint64_t *)vm->arch_vm.sworld_eptp);
+		vm->arch_vm.sworld_eptp = NULL;
 
-	/* Restore memory to guest normal world */
-	ept_mr_add(vm, vm->arch_vm.nworld_eptp, hpa, gpa_uos, size, EPT_RWX | EPT_WB);
+		/* Restore memory to guest normal world */
+		ept_mr_add(vm, vm->arch_vm.nworld_eptp, hpa, gpa_uos, size, EPT_RWX | EPT_WB);
+	} else {
+		pr_err("sworld eptp is NULL, it's not created");
+	}
 }
 
 static inline void save_fxstore_guest_area(struct ext_context *ext_ctx)
@@ -497,13 +496,12 @@ void trusty_set_dseed(const void *dseed, uint8_t dseed_num)
 		g_key_info.num_seeds = 1U;
 		(void)memset(g_key_info.dseed_list[0].seed, 0xA5U,
 			sizeof(g_key_info.dseed_list[0].seed));
-		return;
+	} else {
+		g_key_info.num_seeds = dseed_num;
+		(void)memcpy_s(&g_key_info.dseed_list,
+				sizeof(struct seed_info) * dseed_num,
+				dseed, sizeof(struct seed_info) * dseed_num);
 	}
-
-	g_key_info.num_seeds = dseed_num;
-	(void)memcpy_s(&g_key_info.dseed_list,
-			sizeof(struct seed_info) * dseed_num,
-			dseed, sizeof(struct seed_info) * dseed_num);
 }
 
 void save_sworld_context(struct acrn_vcpu *vcpu)

hypervisor/include/arch/x86/io.h

@@ -81,13 +81,15 @@ static inline void pio_write(uint32_t v, uint16_t addr, size_t sz)
 
 static inline uint32_t pio_read(uint16_t addr, size_t sz)
 {
+	uint32_t ret;
 	if (sz == 1U) {
-		return pio_read8(addr);
-	}
-	if (sz == 2U) {
-		return pio_read16(addr);
+		ret = pio_read8(addr);
+	} else if (sz == 2U) {
+		ret = pio_read16(addr);
+	} else {
+		ret = pio_read32(addr);
 	}
-	return pio_read32(addr);
+	return ret;
 }
 
 /** Writes a 64 bit value to a memory mapped IO device.