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ZideChen0wenlingz
ZideChen0
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wenlingz
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hv: refine a few functions to only one exit point
IEC 61508,ISO 26262 standards highly recommend single-exit rule. 7C: Procedure has more than one exit point. Tracked-On: #861 Signed-off-by: Zide Chen <zide.chen@intel.com> Acked-by: Anthony Xu <anthony.xu@intel.com>
1 parent 64a4630 commit 4c28e98

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3 files changed

+65
-65
lines changed

3 files changed

+65
-65
lines changed

‎hypervisor/arch/x86/guest/vmtrr.c

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -44,10 +44,11 @@ static uint32_t get_index_of_fixed_mtrr(uint32_t msr)
4444

4545
for (i = 0U; i < FIXED_RANGE_MTRR_NUM; i++) {
4646
if (fixed_mtrr_map[i].msr == msr) {
47-
return i;
47+
break;
4848
}
4949
}
50-
return FIXED_MTRR_INVALID_INDEX;
50+
51+
return (i < FIXED_RANGE_MTRR_NUM) ? i : FIXED_MTRR_INVALID_INDEX;
5152
}
5253

5354
static uint32_t

‎hypervisor/dm/vioapic.c

Lines changed: 24 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -55,26 +55,23 @@ vioapic_send_intr(struct acrn_vioapic *vioapic, uint32_t pin)
5555

5656
if ((rte.full & IOAPIC_RTE_INTMASK) == IOAPIC_RTE_INTMSET) {
5757
dev_dbg(ACRN_DBG_IOAPIC, "ioapic pin%hhu: masked", pin);
58-
return;
59-
}
58+
} else {
59+
phys = ((rte.full & IOAPIC_RTE_DESTMOD) == IOAPIC_RTE_DESTPHY);
60+
delmode = (uint32_t)(rte.full & IOAPIC_RTE_DELMOD);
61+
level = ((rte.full & IOAPIC_RTE_TRGRLVL) != 0UL);
6062

61-
phys = ((rte.full & IOAPIC_RTE_DESTMOD) == IOAPIC_RTE_DESTPHY);
62-
delmode = (uint32_t)(rte.full & IOAPIC_RTE_DELMOD);
63-
level = ((rte.full & IOAPIC_RTE_TRGRLVL) != 0UL);
64-
/* For level trigger irq, avoid send intr if
65-
* previous one hasn't received EOI
66-
*/
67-
if (level) {
68-
if ((vioapic->rtbl[pin].full & IOAPIC_RTE_REM_IRR) != 0UL) {
69-
return;
63+
/* For level trigger irq, avoid send intr if
64+
* previous one hasn't received EOI
65+
*/
66+
if (!level || ((vioapic->rtbl[pin].full & IOAPIC_RTE_REM_IRR) == 0UL)) {
67+
if (level) {
68+
vioapic->rtbl[pin].full |= IOAPIC_RTE_REM_IRR;
69+
}
70+
vector = rte.u.lo_32 & IOAPIC_RTE_LOW_INTVEC;
71+
dest = (uint32_t)(rte.full >> IOAPIC_RTE_DEST_SHIFT);
72+
vlapic_deliver_intr(vioapic->vm, level, dest, phys, delmode, vector, false);
7073
}
71-
vioapic->rtbl[pin].full |= IOAPIC_RTE_REM_IRR;
7274
}
73-
74-
vector = rte.u.lo_32 & IOAPIC_RTE_LOW_INTVEC;
75-
dest = (uint32_t)(rte.full >> IOAPIC_RTE_DEST_SHIFT);
76-
vlapic_deliver_intr(vioapic->vm, level, dest, phys,
77-
delmode, vector, false);
7875
}
7976

8077
/**
@@ -216,18 +213,20 @@ vioapic_update_tmr(struct acrn_vcpu *vcpu)
216213
static uint32_t
217214
vioapic_indirect_read(const struct acrn_vioapic *vioapic, uint32_t addr)
218215
{
219-
uint32_t regnum;
216+
uint32_t regnum, ret = 0U;
220217
uint32_t pin, pincount = vioapic_pincount(vioapic->vm);
221218

222219
regnum = addr & 0xffU;
223220
switch (regnum) {
224221
case IOAPIC_ID:
225-
return vioapic->id;
222+
ret = vioapic->id;
223+
break;
226224
case IOAPIC_VER:
227-
return (((uint32_t)pincount - 1U) << MAX_RTE_SHIFT) |
228-
ACRN_IOAPIC_VERSION;
225+
ret = (((uint32_t)pincount - 1U) << MAX_RTE_SHIFT) | ACRN_IOAPIC_VERSION;
226+
break;
229227
case IOAPIC_ARB:
230-
return vioapic->id;
228+
ret = vioapic->id;
229+
break;
231230
default:
232231
/*
233232
* In this switch statement, regnum shall either be IOAPIC_ID or
@@ -245,13 +244,13 @@ vioapic_indirect_read(const struct acrn_vioapic *vioapic, uint32_t addr)
245244
uint32_t rte_offset = addr_offset >> 1U;
246245
pin = rte_offset;
247246
if ((addr_offset & 0x1U) != 0U) {
248-
return vioapic->rtbl[pin].u.hi_32;
247+
ret = vioapic->rtbl[pin].u.hi_32;
249248
} else {
250-
return vioapic->rtbl[pin].u.lo_32;
249+
ret = vioapic->rtbl[pin].u.lo_32;
251250
}
252251
}
253252

254-
return 0;
253+
return ret;
255254
}
256255

257256
static inline bool vioapic_need_intr(const struct acrn_vioapic *vioapic, uint16_t pin)

‎hypervisor/dm/vpic.c

Lines changed: 38 additions & 38 deletions
Original file line numberDiff line numberDiff line change
@@ -49,6 +49,7 @@ static inline bool master_pic(const struct acrn_vpic *vpic, struct i8259_reg_sta
4949
static inline uint8_t vpic_get_highest_isrpin(const struct i8259_reg_state *i8259)
5050
{
5151
uint8_t bit, pin, i;
52+
uint8_t found_pin = VPIC_INVALID_PIN;
5253

5354
pin = (i8259->lowprio + 1U) & 0x7U;
5455

@@ -64,18 +65,20 @@ static inline uint8_t vpic_get_highest_isrpin(const struct i8259_reg_state *i825
6465
pin = (pin + 1U) & 0x7U;
6566
continue;
6667
} else {
67-
return pin;
68+
found_pin = pin;
69+
break;
6870
}
6971
}
7072
pin = (pin + 1U) & 0x7U;
7173
}
7274

73-
return VPIC_INVALID_PIN;
75+
return found_pin;
7476
}
7577

7678
static inline uint8_t vpic_get_highest_irrpin(const struct i8259_reg_state *i8259)
7779
{
7880
uint8_t serviced, bit, pin, tmp;
81+
uint8_t found_pin = VPIC_INVALID_PIN;
7982

8083
/*
8184
* In 'Special Fully-Nested Mode' when an interrupt request from
@@ -115,13 +118,14 @@ static inline uint8_t vpic_get_highest_irrpin(const struct i8259_reg_state *i825
115118
* the corresponding 'pin' to the caller.
116119
*/
117120
if (((i8259->request & bit) != 0) && ((i8259->mask & bit) == 0)) {
118-
return pin;
121+
found_pin = pin;
122+
break;
119123
}
120124

121125
pin = (pin + 1U) & 0x7U;
122126
}
123127

124-
return VPIC_INVALID_PIN;
128+
return found_pin;
125129
}
126130

127131
static void vpic_notify_intr(struct acrn_vpic *vpic)
@@ -457,42 +461,38 @@ void vpic_set_irq(struct acrn_vm *vm, uint32_t irq, uint32_t operation)
457461
struct i8259_reg_state *i8259;
458462
uint8_t pin;
459463

460-
if (irq >= NR_VPIC_PINS_TOTAL) {
461-
return;
462-
}
463-
464-
vpic = vm_pic(vm);
465-
i8259 = &vpic->i8259[irq >> 3U];
466-
pin = (uint8_t)irq;
464+
if (irq < NR_VPIC_PINS_TOTAL) {
465+
vpic = vm_pic(vm);
466+
i8259 = &vpic->i8259[irq >> 3U];
467+
pin = (uint8_t)irq;
467468

468-
if (i8259->ready == false) {
469-
return;
470-
}
471-
472-
spinlock_obtain(&(vpic->lock));
473-
switch (operation) {
474-
case GSI_SET_HIGH:
475-
vpic_set_pinstate(vpic, pin, 1U);
476-
break;
477-
case GSI_SET_LOW:
478-
vpic_set_pinstate(vpic, pin, 0U);
479-
break;
480-
case GSI_RAISING_PULSE:
481-
vpic_set_pinstate(vpic, pin, 1U);
482-
vpic_set_pinstate(vpic, pin, 0U);
483-
break;
484-
case GSI_FALLING_PULSE:
485-
vpic_set_pinstate(vpic, pin, 0U);
486-
vpic_set_pinstate(vpic, pin, 1U);
487-
break;
488-
default:
489-
/*
490-
* The function caller could guarantee the pre condition.
491-
*/
492-
break;
469+
if (i8259->ready) {
470+
spinlock_obtain(&(vpic->lock));
471+
switch (operation) {
472+
case GSI_SET_HIGH:
473+
vpic_set_pinstate(vpic, pin, 1U);
474+
break;
475+
case GSI_SET_LOW:
476+
vpic_set_pinstate(vpic, pin, 0U);
477+
break;
478+
case GSI_RAISING_PULSE:
479+
vpic_set_pinstate(vpic, pin, 1U);
480+
vpic_set_pinstate(vpic, pin, 0U);
481+
break;
482+
case GSI_FALLING_PULSE:
483+
vpic_set_pinstate(vpic, pin, 0U);
484+
vpic_set_pinstate(vpic, pin, 1U);
485+
break;
486+
default:
487+
/*
488+
* The function caller could guarantee the pre condition.
489+
*/
490+
break;
491+
}
492+
vpic_notify_intr(vpic);
493+
spinlock_release(&(vpic->lock));
494+
}
493495
}
494-
vpic_notify_intr(vpic);
495-
spinlock_release(&(vpic->lock));
496496
}
497497

498498
uint32_t

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