Skip to content

Commit b3c199d

Browse files
shiqinggwenlingz
authored andcommitted
hv: mmio_read: add const qualifier
This patch fixes the MISRA-C violations related to mmio_read** * add `const` qualifier in implementation of mmio_read** `const` qualifier shall be added Tracked-On: #861 Signed-off-by: Shiqing Gao <shiqing.gao@intel.com> Reviewed-by: Eddie Dong <eddie.dong@intel.com> Reviewed-by: Li, Fei1 <fei1.li@intel.com>
1 parent 1dee629 commit b3c199d

File tree

1 file changed

+4
-4
lines changed
  • hypervisor/include/arch/x86

1 file changed

+4
-4
lines changed

hypervisor/include/arch/x86/io.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -144,7 +144,7 @@ static inline void mmio_write8(uint8_t value, void *addr)
144144
*/
145145
static inline uint64_t mmio_read64(const void *addr)
146146
{
147-
return *((volatile uint64_t *)addr);
147+
return *((volatile const uint64_t *)addr);
148148
}
149149

150150
/** Reads a 32 bit value from a memory mapped IO device.
@@ -155,7 +155,7 @@ static inline uint64_t mmio_read64(const void *addr)
155155
*/
156156
static inline uint32_t mmio_read32(const void *addr)
157157
{
158-
return *((volatile uint32_t *)addr);
158+
return *((volatile const uint32_t *)addr);
159159
}
160160

161161
/** Reads a 16 bit value from a memory mapped IO device.
@@ -166,7 +166,7 @@ static inline uint32_t mmio_read32(const void *addr)
166166
*/
167167
static inline uint16_t mmio_read16(const void *addr)
168168
{
169-
return *((volatile uint16_t *)addr);
169+
return *((volatile const uint16_t *)addr);
170170
}
171171

172172
/** Reads an 8 bit value from a memory mapped IO device.
@@ -177,7 +177,7 @@ static inline uint16_t mmio_read16(const void *addr)
177177
*/
178178
static inline uint8_t mmio_read8(const void *addr)
179179
{
180-
return *((volatile uint8_t *)addr);
180+
return *((volatile const uint8_t *)addr);
181181
}
182182

183183
/** Reads a 64 Bit memory mapped IO register, mask it and write it back into

0 commit comments

Comments
 (0)