Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

Sign up for GitHub

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Jump to bottom

target/fpga: Add Hyperram #127

Draft
wants to merge 4 commits into
base: main
Choose a base branch
from
Draft

target/fpga: Add Hyperram #127

wants to merge 4 commits into from

Conversation

niwis
Copy link
Contributor

@niwis niwis commented May 31, 2024

Optionally use Hyperram instead of DDR3 on Genesys2.

ToDo:

  • Integrate Hyperram
  • Add constraints
  • Streamline switching between DDR3 and Hyperram (add another target?)

niwis added 4 commits May 31, 2024 12:18
@niwis
fpga: Add Hyperbus
530545b 
Signed-off-by: Nils Wistoff <nwistoff@iis.ee.ethz.ch>
@niwis
fpga/hyperbus: Bugfixes
1793645 
Signed-off-by: Nils Wistoff <nwistoff@iis.ee.ethz.ch>
@niwis
fpga: Connect hyperram config reg
da5f338 
Signed-off-by: Nils Wistoff <nwistoff@iis.ee.ethz.ch>
@niwis
hyperram: Fix constraints, address map
0a6fe6d 
Signed-off-by: Nils Wistoff <nwistoff@iis.ee.ethz.ch>
Aquaticfuller pushed a commit that referenced this pull request Jul 16, 2024
@bluewww
Merge pull request #127 from pulp-platform/nwistoff/weekly-release
2bbd29d 
CHANGELOG_WEEKLY.md: Add weekly_20230814
@paulsc96 paulsc96 mentioned this pull request Nov 14, 2024
Draft
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Reviewers
No reviews
Assignees
No one assigned
Labels
None yet
Projects
None yet
Milestone
No milestone
Development

Successfully merging this pull request may close these issues.
1 participant
@niwis