[DRAMsys 5.0] DRAMsys co-simulation with MemPool/TeraPool system (#106) #1575

Job	Run time
tc-gcc	31s
tc-llvm	58s
riscv-isa-sim	13s
check-opcodes	3s
verilator	5s
verilator-model (minpool)	12s
verilator-model (mempool)	7s
unit-test	1m 50s
build-apps-gcc (minpool)	1m 0s
build-apps-gcc (mempool)	1m 0s
check-bootrom	12s
tc-halide	8s
build-apps-llvm (minpool)	46s
build-apps-llvm (mempool)	48s
build-apps-halide (minpool)	34s
build-apps-halide (mempool)	35s
run-apps-gcc (minpool)	35s
run-apps-gcc (mempool)	2m 21s
run-apps-llvm (minpool)	25s
run-apps-llvm (mempool)	2m 20s
run-apps-halide (minpool)	30s
run-apps-halide (mempool)	2m 37s
clean-up	4s
clean-up-compile-runs (minpool)	3s
clean-up-compile-runs (mempool)	2s
	17m 59s

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